Keyword : parallel counters


A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic
Katsuhiko DEGAWA Takafumi AOKI Tatsuo HIGUCHI Hiroshi INOKAWA Yasuo TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/11/01
Vol. E87-C  No. 11 ; pp. 1827-1836
Type of Manuscript:  Special Section PAPER (Special Section on New System Paradigms for Integrated Electronics)
Category: 
Keyword: 
single-electron transistorsmultiple-valued logicquantum deviceslogic circuitsparallel counters
 Summary | Full Text:PDF(1.1MB)

Counter Tree Diagrams: A Unified Framework for Analyzing Fast Addition Algorithms
Jun SAKIYAMA Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12 ; pp. 3009-3019
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: IP Design
Keyword: 
computer arithmetic algorithmsparallel countersmultipliersdatapathVLSIcircuit synthesis
 Summary | Full Text:PDF(905.4KB)