Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/12/01 Vol. E87-ANo. 12pp. 3200-3207 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Test Keyword: controller,
delay fault,
non-scan design,
invalid test state and transition generator,
at-speed test,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/07/20 Vol. E81-DNo. 7pp. 645-653 Type of Manuscript: Special Section PAPER (Special Issue on Test and Diagnosis of VLSI) Category: Test Synthesis Keyword: high-level synthesis,
testability,
sequential ATPG,
non-scan design,
