Keyword : network-on-chip (NoC)


The Performance Evaluation of a 3D Torus Network Using Partial Link-Sharing Method in NoC Router Buffer
Naohisa FUKASE Yasuyuki MIURA Shigeyoshi WATANABE M.M. HAFIZUR RAHMAN 
Publication:   
Publication Date: 2017/10/01
Vol. E100-D  No. 10 ; pp. 2478-2492
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
interconnection networknetwork-on-chip (NoC)routermulti-port memory
 Summary | Full Text:PDF(4.8MB)

A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores
Seungju LEE Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/09/01
Vol. E95-A  No. 9 ; pp. 1538-1549
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
network-on-chip (NoC)hybrid NoC algorithmhierarchical NoCbusmesh NoC (BMNoC)
 Summary | Full Text:PDF(1.6MB)

A Scalable and Reconfigurable Fault-Tolerant Distributed Routing Algorithm for NoCs
Zewen SHI Xiaoyang ZENG Zhiyi YU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/07/01
Vol. E94-D  No. 7 ; pp. 1386-1397
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
fault-tolerant routingnetwork-on-chip (NoC)deadlock-freedivide-and-conquersystem partition
 Summary | Full Text:PDF(3.2MB)

A New Multiple-Round Dimension-Order Routing for Networks-on-Chip
Binzhang FU Yinhe HAN Huawei LI Xiaowei LI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/04/01
Vol. E94-D  No. 4 ; pp. 809-821
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
network-on-chip (NoC)fault-tolerant routingmultiple round dimension-order routingturn model
 Summary | Full Text:PDF(1.1MB)

Implementation of a High-Speed Asynchronous Data-Transfer Chip Based on Multiple-Valued Current-Signal Multiplexing
Tomohiro TAKAHASHI Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11 ; pp. 1598-1604
Type of Manuscript:  Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
network-on-chip (NoC)delay-insensitivedual-rail encodingglobally asynchronous locally synchronous (GALS)point-to-point communication
 Summary | Full Text:PDF(17.1MB)