Keyword : multiprocessor


Dynamic Scheduling Real-Time Task Using Primary-Backup Overloading Strategy for Multiprocessor Systems
Wei SUN Chen YU Xavier DEFAGO Yasushi INOGUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3 ; pp. 796-806
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
real-timemultiprocessorfault tolerancedynamic task scheduling
 Summary | Full Text:PDF(949KB)

Finish Time Predictability of Earliest Deadline Zero Laxity Algorithm for Multiprocessor Real-Time Systems
Sangchul HAN Heeheon KIM Xuefeng PIAO Minkyu PARK Seongje CHO Yookun CHO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2006/12/01
Vol. E89-D  No. 12 ; pp. 2981-2984
Type of Manuscript:  LETTER
Category: System Programs
Keyword: 
embedded real-time systemmultiprocessorpriority-driven schedulingEarliest Deadline Zero Laxityfinish time predictability
 Summary | Full Text:PDF(122.5KB)

Minimizing the Directory Size for Large-Scale Shared-Memory Multiprocessors
Jinseok KONG Pen-Chung YEW Gyungho LEE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/11/01
Vol. E88-D  No. 11 ; pp. 2533-2543
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
cache coherencedirectory protocolmultiprocessorshared memory architecture
 Summary | Full Text:PDF(920.3KB)

Comparison of Deadline-Based Scheduling Algorithms for Periodic Real-Time Tasks on Multiprocessor
Minkyu PARK Sangchul HAN Heeheon KIM Seongje CHO Yookun CHO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/03/01
Vol. E88-D  No. 3 ; pp. 658-661
Type of Manuscript:  LETTER
Category: System Programs
Keyword: 
multiprocessorreal-timeschedulingperiodicdeadline
 Summary | Full Text:PDF(175.4KB)

Binding Time in Distributed Shared Memories for Generic Patterns of Memory References
Jinseok KONG Gyungho LEE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/08/01
Vol. E87-D  No. 8 ; pp. 2148-2151
Type of Manuscript:  LETTER
Category: Computer Systems
Keyword: 
cc-NUMACOMAdistributed shared memorymultiprocessor
 Summary | Full Text:PDF(298.4KB)

Delaying Coherence Requests to Enhance the Performance of Strict Consistency Models
Young Chul SOHN NaiHoon JEONG Jin-Soo KIM Seung Ryoul MAENG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/03/01
Vol. E87-D  No. 3 ; pp. 751-760
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
multiprocessordistributed shared memorymemory consistency modelILP
 Summary | Full Text:PDF(702.4KB)

Efficient Real-Time Scheduling Algorithms for Multiprocessor Systems
Seongje CHO Suk-Kyoon LEE Sang AHN Kwei-Jay LIN 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2002/12/01
Vol. E85-B  No. 12 ; pp. 2859-2867
Type of Manuscript:  PAPER
Category: Network
Keyword: 
real-time schedulingEarliest Deadline/Least LaxityEarliest Deadline Zero Laxitymultiprocessor
 Summary | Full Text:PDF(298.9KB)

Effective Scheduling of Duplicated Tasks for Fault Tolerance in Multiprocessor Systems
Koji HASHIMOTO Tatsuhiro TSUCHIYA Tohru KIKUNO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/03/01
Vol. E85-D  No. 3 ; pp. 525-534
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
multiprocessorfault-tolerant schedulingtask graphheightstask groups
 Summary | Full Text:PDF(733.8KB)

A Single Chip Multiprocessor Integrated with High Density DRAM
Tadaaki YAMAUCHI Lance HAMMOND Oyekunle A. OLUKOTUN Kazutami ARIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/08/25
Vol. E82-C  No. 8 ; pp. 1567-1577
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
DRAMoh-chip DRAMembedded DRAMon-chip L2 cachesSRAM cachesmultiprocessormultiprocessor-on-a-chip
 Summary | Full Text:PDF(437.7KB)

Media Core Processor for Multimedia Application System
Kosuke YOSHIOKA Makoto HIRAI Kozo KIMURA Tokuzo KIYOHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/02/25
Vol. E82-A  No. 2 ; pp. 206-214
Type of Manuscript:  Special Section PAPER (Special Section on VLSI for Digital Signal Processing)
Category: 
Keyword: 
media processormultiprocessormultimedia
 Summary | Full Text:PDF(309.2KB)

MINC: Multistage Interconnection Network with Cache Control Mechanism
Toshihiro HANAWA Takayuki KAMEI Hideki YASUKAWA Katsunobu NISHIMURA Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/09/25
Vol. E80-D  No. 9 ; pp. 863-870
Type of Manuscript:  Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Interconnection Networks
Keyword: 
MINcoherent cachedirectory schememultiprocessorcongestion analysisVLSI implementation
 Summary | Full Text:PDF(721.1KB)

Achieving Fault Tolerance in Pipelined Multiprocessor Systems
Jeng-Ping LIN Sy-Yen KUO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/06/25
Vol. E80-D  No. 6 ; pp. 665-671
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
precise computation stateerror recoverycheckpointpipelined machinemultiprocessor
 Summary | Full Text:PDF(536.7KB)

An Efficient Task Scheduling Scheme for Mesh Multicomputers
Oh Han KANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/06/25
Vol. E80-D  No. 6 ; pp. 646-652
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
task schedulingmultiprocessorfragmentationmesh multicomputerssubmesh allocation
 Summary | Full Text:PDF(532.6KB)

Parallel Genetic Algorithm for Constrained Clustering
Myung-Mook HAN Shoji TATSUMI Yasuhiko KITAMURA Takaaki OKUMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/02/25
Vol. E80-A  No. 2 ; pp. 416-422
Type of Manuscript:  LETTER
Category: Modeling and Simulation
Keyword: 
parallel processingGenetic Algorithmmultiprocessorconstrained clustering
 Summary | Full Text:PDF(511.4KB)

Distributed RAID Style Video Server
Shunichiro NAKAMURA Harumi MINEMURA Tomohisa YAMAGUCHI Hiroshi SHIMIZU Takashi WATANABE Tadanori MIZUNO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1996/08/25
Vol. E79-B  No. 8 ; pp. 1030-1038
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia on Demand)
Category: 
Keyword: 
RAIDdistributed systemmultiprocessorvideo on demandvideo server
 Summary | Full Text:PDF(778.5KB)

Parallel Genetic Algorithms Based on a Multiprocessor System FIN and Its Application
Myung-Mook HAN Shoji TATSUMI Yasuhiko KITAMURA Takaaki OKUMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/11/25
Vol. E78-A  No. 11 ; pp. 1595-1605
Type of Manuscript:  PAPER
Category: Algorithms and Data Structures
Keyword: 
parallel processinggenetic algorithmmultiprocessortraveling salesman problem
 Summary | Full Text:PDF(917.8KB)

A Selective Invalidation Strategy for Cache Coherence
Cosimo Antonio PRETE Gianpaolo PRINA Luigi RICCIARDI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/10/25
Vol. E78-D  No. 10 ; pp. 1316-1320
Type of Manuscript:  LETTER
Category: Computer Hardware and Design
Keyword: 
cachecoherence protocolmultiprocessor
 Summary | Full Text:PDF(322.5KB)

Performance Evaluation of a Processing Element for an On-Chip Multiprocessor
Masafumi TAKAHASHI Hiroshige FUJII Emi KANEKO Takeshi YOSHIDA Toshinori SATO Hiroyuki TAKANO Haruyuki TAGO Seigo SUZUKI Nobuyuki GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/07/25
Vol. E77-C  No. 7 ; pp. 1092-1100
Type of Manuscript:  Special Section PAPER (Special Issue on Super Chip for Intelligent Integrated Systems)
Category: 
Keyword: 
multiprocessorshared FPUon-chip cacheprefetch
 Summary | Full Text:PDF(878.8KB)

Three Dimensional Optical Interconnection Technology for Massively-Parallel Computing Systems
Kazuo KYUMA Shuichi TAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7 ; pp. 1070-1079
Type of Manuscript:  INVITED PAPER (Special Issue on New Architecture LSIs)
Category: 
Keyword: 
optical interconnectioninterconnection networkthree dimensional opticsmassively-parallel computerneural networkmultiprocessorcrossbar networkmultistage interconnection networksmart pixelspatial light modulatoroptical switchvariable sensitivity photodetectorphotorefractive crystalvolume hologramoptical neurochipartificial retinaoptical bus line
 Summary | Full Text:PDF(901.4KB)

Multiprocessor Implementation of 2-D Denominator-Separable Digital Filters Using Block Processing
Tsuyosi TAKEBE Masatoshi MURAKAMI Koji HATANAKA Shinya KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/07/25
Vol. E75-A  No. 7 ; pp. 846-851
Type of Manuscript:  Special Section PAPER (Special Section on Multidimensional Signal Processing)
Category: Design and Implementation of Multidimensional Digital Filters
Keyword: 
multiprocessor2-D digital filterdigital filter implementationblock processingstate space realization
 Summary | Full Text:PDF(492.7KB)

A Cache-Coherent, Distributed Memory Multiprocessor System and Its Performance Analysis
Douglas E. MARQUARDT Hasan S. ALKHATIB 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1992/05/25
Vol. E75-D  No. 3 ; pp. 274-290
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
cachecache coherencymulticache consistencymultiprocessorperformance evaluation
 Summary | Full Text:PDF(1.4MB)