Keyword : low power CMOS design

Low Power CMOS Design Challenges
Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/08/01
Vol. E84-C  No. 8  pp. 1021-1028
Type of Manuscript: INVITED PAPER (Special Issue on Silicon Nanodevices)
Category: 
Keyword: 
low power CMOS design,  low voltage,  threshold voltage,  subthreshold leakage current,  downsizing, 
  Summary |  Full Text:PDF (1.2MB)
Variable Threshold-Voltage CMOS Technology
Tadahiro KURODA  Tetsuya FUJITA  Fumitoshi HATORI  Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/11/20
Vol. E83-C  No. 11  pp. 1705-1715
Type of Manuscript: INVITED PAPER (Special Issue on Low-power LSIs and Technologies)
Category: 
Keyword: 
low power CMOS design,  low voltage,  threshold voltage,  substrate bias, 
  Summary |  Full Text:PDF (1.8MB)