Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A
No. 12
pp. 3463-3470
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword:
SoC,
interconnect,
physical parameter,
low-k,
capacitance,
resistance,
layout parasitic extraction,
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