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Keyword : high speed

A Pulse-Generator-Free Hybrid Latch Based Flip-Flop (PHLFF) Xiayu LI Song JIA Limin LIU Yuan WANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/06/01 Vol. E95-C No. 6 pp. 1125-1127 Type of Manuscript: BRIEF PAPER Category: Electronic Circuits Keyword: flip-flop, pulse generator free, high speed, low power,
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Ultra High Speed Modified Booth Encoding Architecture for High Speed Parallel Accumulations Amir FATHI Sarkis AZIZIAN Khayrollah HADIDI Abdollah KHOEI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/04/01 Vol. E95-C No. 4 pp. 706-709 Type of Manuscript: BRIEF PAPER Category: Keyword: Modified Booth Algorithm, high speed,
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CMOS Differential Circuits Using Charge-Redistribution and Reduced-Swing Schemes Hong-Yi HUANG Shiun-Dian JAN Yang CHOU Cheng-Yu CHEN
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/02/01 Vol. E95-C No. 2 pp. 275-283 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: differential logic, charge redistribution, low power, high speed, multiplier-accumulator,
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Full Chip Circuit/Substrate Macro Modeling Method Which Controls the Analysis Accuracy and CPU Time by Using Current Density Mikiko Sode TANAKA Mikihiro KAJITA Naoya NAKAYAMA Satoshi NAKAMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/02/01 Vol. E93-A No. 2 pp. 448-455 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: substrate noise, power supply noise, substrate modeling, clock jitter, high speed,
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Race-Free Mixed Serial-Parallel Comparison for Low Power Content Addressable Memory Seong-Ook JUNG Sei-Seung YOON
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/03/01 Vol. E91-A No. 3 pp. 895-898 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: content addressable memory, high speed, low power, serial CAM, parallel CAM, hybrid CAM,
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Fast-Delay and Low-Power Level Shifter for Low-Voltage Applications O-Sam KWON Kyeong-Sik MIN
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/07/01 Vol. E90-C No. 7 pp. 1540-1543 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: level shifter, low power, high speed, dynamic voltage scaling, low voltage,
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UTC-PD-Based Optoelectronic Components for High-Frequency and High-Speed Applications Satoshi KODAMA Hiroshi ITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/02/01 Vol. E90-C No. 2 pp. 429-435 Type of Manuscript: Special Section PAPER (Special Section on Evolution of Microwave and Millimeter-Wave Photonics Technology) Category: INVITED Keyword: uni-traveling-carrier photodiode (UTC-PD), optoelectronic device, high speed, high frequency, millimeter-wave, monolithic integration, optical gate, signal processing,
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Logic Synthesis Technique for High Speed Differential Dynamic Logic with Asymmetric Slope Transition Masao MORIMOTO Yoshinori TANAKA Makoto NAGATA Kazuo TAKI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3324-3331 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis Keyword: logic synthesis, ASDDL, asymmetric slope, differential logic, high speed,
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High-Speed Digital Circuit Design Using Differential Logic with Asymmetric Signal Transition Masao MORIMOTO Makoto NAGATA Kazuo TAKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/10/01 Vol. E88-C No. 10 pp. 2001-2008 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: ASDDL, ASD-CMOS, asymmetric slope, differential logic, high speed,
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Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous Memories Kiyohiro FURUTANI Takeshi HAMAMOTO Takeo MIKI Masaya NAKANO Takashi KONO Shigeru KIKUDA Yasuhiro KONISHI Tsutomu YOSHIHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/02/01 Vol. E88-C No. 2 pp. 255-263 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: DRAM, redundancy, high speed, high density,
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High Speed Layout Synthesis for Minimum-Width CMOS Logic Cells via Boolean Satisfiability Tetsuya IIZUKA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/12/01 Vol. E87-A No. 12 pp. 3293-3300 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Design Keyword: high speed, cell layout synthesis, Boolean Satisfiability, SAT, CMOS logic cell, minimum width,
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A Low-Power Microcontroller with Body-Tied SOI Technology Hisakazu SATO Yasuhiro NUNOMURA Niichi ITOH Koji NII Kanako YOSHIDA Hironobu ITO Jingo NAKANISHI Hidehiro TAKATA Yasunobu NAKASE Hiroshi MAKINO Akira YAMADA Takahiko ARAKAWA Toru SHIMIZU Yuichi HIRANO Takashi IPPOSHI Shuhei IWADE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-C No. 4 pp. 563-570 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: low power, high speed, microcontroller, SOI,
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A Row-Parallel Position Detector for High-Speed 3-D Camera Based on Light-Section Method Yusuke OIKE Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/11/01 Vol. E86-C No. 11 pp. 2320-2328 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: position detector, smart image sensor, high speed, row-parallel architecture, 3-D camera,
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High-Speed and Low-Power Techniques of Hardware and Software for Digital Signal Processors Hiroshi TAKAHASHI Rimon IKENO Yutaka TOYONOH Akihiro TAKEGAMA Yasumasa IKEZAKI Tohru URASAKI Hitoshi SATOH Masayasu ITOIGAWA Yoshinari MATSUMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/04/01 Vol. E86-C No. 4 pp. 589-596 Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies) Category: Circuit Design Keyword: high speed, low power, fixed point DSP, 160 MHz, 0.18 µm,
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18 Mbit/s Carrier Frequency Offset-Spread Spectrum (CFO-SS) System Using 2.4 GHz ISM Band Hiroyasu ISHIKAWA Naoki FUKE Keizo SUGIYAMA Hideyuki SHINONAGA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-A No. 12 pp. 2839-2846 Type of Manuscript: Special Section PAPER (Special Section on Spread Spectrum Techniques and Applications) Category: Keyword: CFO-SS, wireless access, high speed, 2.4 GHz ISM band, dual-polarization technique,
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Novel Algorithms and VLSI Design for Division over GF(2^m) Chien-Hsing WU Chien-Ming WU Ming-Der SHIEH Yin-Tsung HWANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/05/01 Vol. E85-A No. 5 pp. 1129-1139 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: division algorithm, basis matrix, Stein's algorithm, high speed, finite field,
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Introduction to Robust, Reliable, and High-Speed Power-Line Communication Systems Masaaki KATAYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/12/01 Vol. E84-A No. 12 pp. 2958-2965 Type of Manuscript: INVITED PAPER (Special Section on Spread Spectrum Techniques and Applications) Category: Keyword: power-line communications (PLC), high speed, cyclo-stationary channel, OFDM, CDMA,
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High-Speed and High-Output Uni-Traveling-Carrier Photodiodes Hiroshi ITO Tomofumi FURUTA Tadao ISHIBASHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/10/01 Vol. E84-C No. 10 pp. 1448-1454 Type of Manuscript: INVITED PAPER (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000 (Topical Workshop on Heterostructure Microelectronics 2000)) Category: Novel Electron Devices Keyword: photodiode, high speed, high-output,
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A High-Speed PLA Using Dynamic Array Logic Circuits with Latch Sense Amplifiers Hiroaki YAMAOKA Makoto IKEDA Kunihiro ASADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/09/01 Vol. E84-C No. 9 pp. 1240-1246 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: high speed, PLA, array logic circuit, sense amplifier,
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A High-Endurance Read/Write Scheme for Half-V_cc Plate Nonvolatile DRAMs with Ferroelectric Capacitors Hiroki FUJISAWA Takeshi SAKATA Tomonori SEKIGUCHI Kazuyoshi TORII Katsutaka KIMURA Kazuhiko KAJIGAYA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/06/01 Vol. E84-C No. 6 pp. 763-770 Type of Manuscript: Special Section PAPER (Special Issue on Nonvolatile Memories) Category: FeRAMs Keyword: DRAM, ferroelectric memory, high speed, low-power, high-endurance,
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Dynamic Floating Body Control SOI CMOS for Power Managed Multimedia ULSIs Fukashi MORISHITA Kazutami ARIMOTO Kazuyasu FUJISHIMA Hideyuki OZAKI Tsutomu YOSHIHARA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/02/01 Vol. E84-C No. 2 pp. 253-259 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: SOI, floating body, body control, high speed, low power,
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High-Speed Wide-Locking Range VCO with Frequency Calibration Takeo YASUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/20 Vol. E83-A No. 12 pp. 2616-2622 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Analog Circuit Design Keyword: VCO, PLL, high speed, wide locking range, calibration,
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A 1.2 V, 30 MIPS, 0.3 mA/MIPS and 200 MIPS, 0.58 mA/MIPS Digital Signal Processors Hiroshi TAKAHASHI Shintaro MIZUSHIMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2000/02/20 Vol. E83-C No. 2 pp. 179-185 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies) Category: Keyword: high speed, super low power, MIPS, fixed point DSP, pocket implant, D flip-flop, VIA-2 ROM, 1.2 V, 200 MIPS,
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A High-Speed, Low-Power Phase Frequency Detector and Charge-Pump Circuits for High Frequency Phase-Locked Loops Won-Hyo LEE Sung-Dae LEE Jun-Dong CHO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/20 Vol. E82-A No. 11 pp. 2514-2520 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: PFD, charge-pump, low power, PLL, high speed, D flip-flop, error detection range,
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Current-Sensed SRAM Techniques for Megabit-Class Integration--Progress in Operating Frequency by Using Hidden Writing-Recovery Architecture-- Nobutaro SHIBATA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/11/20 Vol. E82-C No. 11 pp. 2056-2064 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: SRAM, high speed, writing-recovery, current sense, virtual-GND line, squashed memory cell,
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Analysis and Optimization of Floating Body Cell Operation for High-Speed SOI-DRAM Fukashi MORISHITA Yasuo YAMAGUCHI Takahisa EIMORI Toshiyuki OASHI Kazutami ARIMOTO Yasuo INOUE Tadashi NISHIMURA Michihiro YAMADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/03/20 Vol. E82-C No. 3 pp. 544-552 Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology) Category: Silicon Devices Keyword: SOI-DRAM, floating body, high speed, low power, data retention characteristics,
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An FET Coupled Logic (FCL) Circuit for Multi-Gb/s, Low Power and Low Voltage Serial Interface BiCMOS LSIs Hitoshi OKAMURA Masaharu SATO Satoshi NAKAMURA Shuji KISHI Kunio KOKUBU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/03/20 Vol. E82-C No. 3 pp. 531-537 Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology) Category: Silicon Devices Keyword: high speed, low supply voltage, BiCMOS, serial interface,
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Megabit-Class Size-Configurable 250-MHz SRAM Macrocells with a Squashed-Memory-Cell Architecture Nobutaro SHIBATA Hiroshi INOKAWA Keiichiro TOKUNAGA Soichi OHTA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/01/20 Vol. E82-C No. 1 pp. 94-104 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: SRAM, macrocell, size-configurable, high speed, low power, per-bitline architecture, current-sense amplifier, squashed memory cell, trench isolation,
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Ferroelectric Memory Circuit Technology and the Application to Contactless IC Card Koji ASARI Hiroshige HIRANO Toshiyuki HONDA Tatsumi SUMI Masato TAKEO Nobuyuki MORIWAKI George NAKANE Tetsuji NAKAKUMA Shigeo CHAYA Toshio MUKUNOKI Yuji JUDAI Masamichi AZUMA Yasuhiro SHIMADA Tatsuo OTSUKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/04/20 Vol. E81-C No. 4 pp. 488-496 Type of Manuscript: Special Section PAPER (Special Issue on Advanced Memory Devices Using High-Dielectric-Constant and Ferroelectric Thin Films) Category: Keyword: FeRAM, high speed, low voltage, low power consumption, non-volatile, contactless IC card,
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Design of a Sub-1. 5 V, 20 MHz, 0. 1% MOS Current-Mode Sample-and-Hold Circuit Yasuhiro SUGIMOTO Masahiro SEKIYA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/02/20 Vol. E81-A No. 2 pp. 258-260 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era) Category: Keyword: low voltage, high speed, high accuracy, MOS analog circuit, sample-and-hold circuit,
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Low-Power Circuit Design Techniques for Si Bipolar Gbit/s LSIsAn Overview Haruhiko ICHINO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/12/20 Vol. E80-C No. 12 pp. 1511-1522 Type of Manuscript: INVITED PAPER (Special Issue on Low-Power and High-Speed LSI Technologies) Category: Keyword: Si bipolar, high speed, low power, optical transmission,
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Design and Architecture for Low-Power/High-Speed RISC Microprocessor: SuperH Hideo MAEJIMA Masahiro KAINAGA Kunio UCHIYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/12/20 Vol. E80-C No. 12 pp. 1539-1545 Type of Manuscript: INVITED PAPER (Special Issue on Low-Power and High-Speed LSI Technologies) Category: Keyword: RISC, architecture, low power, high speed, microprocessor,
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A 100 MIPS High Speed and Low Power Digital Signal Processor Hiroshi TAKAHASHI Shigeshi ABIKO Shintaro MIZUSHIMA Yuji OZAWA Kenichi TASHIRO Shigetoshi MURAMATSU Masahiro FUSUMADA Akemi TODOROKI Youichi TANAKA Masayasu ITOIGAWA Isao MORIOKA Hiroyuki MIZUNO Miki KOJIMA Giovanni NASO Emmanuel EGO Frank CHIRAT
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/12/20 Vol. E80-C No. 12 pp. 1546-1552 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies) Category: Keyword: 100 MIPS, digital signal processing, high speed, low power, CPU,
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A 167-MHz 1-Mbit CMOS Synchronous Cache SRAM Hideharu YAHATA Yoji NISHIO Kunihiro KOMIYAJI Hiroshi TOYOSHIMA Atsushi HIRAISHI Yoshitaka KINOSHITA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/04/20 Vol. E80-C No. 4 pp. 557-565 Type of Manuscript: Special Section PAPER (Special Issue on Circuit Technologies for Memory and Analog LSIs) Category: Keyword: CMOS, high speed, cache SRAM, chip floor plan, sense amplifier, output register, setup/hold time,
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Circuit Technology for Giga-bit/Low Voltage Operating SOI-DRAM Akihiko YASUOKA Kazutami ARIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1997/03/20 Vol. E80-C No. 3 pp. 436-442 Type of Manuscript: INVITED PAPER (Special Issue on SOI Devices and Their Process Technologies) Category: Circuit Technologies and Applications Keyword: low voltage operation, SOI-DRAM, body control, long data retention time, high speed,
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A 1.3 V Supply Voltage AlGaAs/InGaAs HJFET SCFL D-FF Operating at up to 10 Gbps Masahiro FUJII Tadashi MAEDA Yasuo OHNO Masatoshi TOKUSHIMA Masaoki ISHIKAWA Muneo FUKAISHI Hikaru HIDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/04/20 Vol. E79-C No. 4 pp. 512-517 Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed LSIs) Category: Keyword: low power, high speed, GaAs, heterojunction FET, SCFL, logic swing, low supply voltage, D-FF,
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A Circuit Library for Low Power and High Speed Digital Signal Processor Hiroshi TAKAHASHI Shigeshi ABIKO Shintaro MIZUSHIMA Yuni OZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/20 Vol. E78-C No. 12 pp. 1717-1725 Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: low power, high speed, low cost, GSM, PDC, NADC, digital signal processing, personal communication, 50 MIPS, CPU,
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622 Mbps 8 mW CMOS Low-Voltage Interface Circuit Takashi TOMITA Koichi YOKOMIZO Takao HIRAKOSO Kazukiyo HAGA Kuniharu HIROSE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/20 Vol. E78-C No. 12 pp. 1726-1732 Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: CMOS, interface circuit, high speed, small swing, low voltage,
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A Low-Power and High-Speed Impulse-Transmission CMOS Interface Circuit Masafumi NOGAWA Yusuke OHTOMO Masayuki INO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/20 Vol. E78-C No. 12 pp. 1733-1737 Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: CMOS, low-voltage swing, interface, low power, high speed, impulse transmission,
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High Speed GaAs Digital Integrated Circuits Masahiro AKIYAMA Seiji NISHI Yasushi KAWAKAMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/09/20 Vol. E78-C No. 9 pp. 1165-1170 Type of Manuscript: INVITED PAPER (Special Issue on Ultra-High-Speed Electron Devices) Category: Keyword: GaAs digital IC, DCFL, SBFL, high speed, low power, self-alignment process, recessed gate process, circuit design, standard cell,
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Process and Device Technologies for High Speed Self-Aligned Bipolar Transistors Tohru NAKAMURA Takeo SHIBA Takahiro ONAI Takashi UCHINO Yukihiro KIYOTA Katsuyoshi WASHIO Noriyuki HOMMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/09/20 Vol. E78-C No. 9 pp. 1154-1164 Type of Manuscript: INVITED PAPER (Special Issue on Ultra-High-Speed Electron Devices) Category: Keyword: silicon bipolar, double polysilicon, high speed, self-alignment,
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A Video-Rate 10-b Triple-Stage Bi-CMOS A/D Converter Akira MATSUZAWA Shoichiro TADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1994/12/20 Vol. E77-C No. 12 pp. 1903-1911 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs) Category: Analog LSIs Keyword: analog, data converter, A/D converter, video, Bi-CMOS, sample and hold, interpolation, high speed, high resolution, comparator, differential amplifier, multi-stage, mixed signal,
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High-Speed Circuit Techniques for Battery-Operated 16 Mbit CMOS DRAM Toshikazu SUZUKI Toru IWATA Hironori AKAMATSU Akihiro SAWADA Toshiaki TSUJI Hiroyuki YAMAUCHI Takashi TANIGUCHI Tsutomu FUJITA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1994/08/20 Vol. E77-C No. 8 pp. 1334-1342 Type of Manuscript: Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories) Category: DRAM Keyword: DRAM, cycle time, battery operating, high speed,
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A 10-b 300-MHz Interpolated-Parallel A/D Converter Hiroshi KIMURA Akira MATSUZAWA Takashi NAKAMURA Shigeki SAWADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/05/20 Vol. E76-C No. 5 pp. 778-786 Type of Manuscript: Special Section PAPER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993)) Category: Keyword: A/D converter, parallel, interpolation, high speed, high resolution, linearity, circuit, bipolar, submicrometer, folding, encoder, logic,
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Investigation on High-Speed Performance of 0.1-µm-Gate, Ultrathin-Film CMOS/SIMOX Yasuhisa OMURA Sadao NAKASHIMA Katsutoshi IZUMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/12/20 Vol. E75-C No. 12 pp. 1491-1497 Type of Manuscript: Special Section PAPER (Special Issue on SOI (Si on Insulator) Devices) Category: Deep Sub-micron SOI CMOS Keyword: CMOS, SOI, SIMOX, ultrathin, high speed,
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An MOS Current Mode Logic (MCML) Circuit for Low-Power Sub-GHz Processors Masakazu YAMASHINA Hachiro YAMADA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/10/20 Vol. E75-C No. 10 pp. 1181-1187 Type of Manuscript: Special Section PAPER (Special Issue on Microprocessors) Category: Low-Voltage Operation Keyword: current mode logic, low power, high speed, MOS,
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