Keyword : hardware algorithm


High-Throughput Rapid Single-Flux-Quantum Circuit Implementations for Exponential and Logarithm Computation Using the Radix-2 Signed-Digit Representation
Masamitsu TANAKA Kazuyoshi TAKAGI Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6 ; pp. 703-709
Type of Manuscript:  Special Section PAPER (Special Section on Cutting-Edge Technologies of Superconducting Electronics)
Category: 
Keyword: 
digital arithmeticdigit-serial processinghardware algorithmrapid single-flux-quantum logicsigned-digit representationsystolic array
 Summary | Full Text:PDF(471.1KB)

Comparisons of Synchronous-Clocking SFQ Adders
Naofumi TAKAGI Masamitsu TANAKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/04/01
Vol. E93-C  No. 4 ; pp. 429-434
Type of Manuscript:  INVITED PAPER (Special Section on Frontiers of Superconductive Electronics)
Category: 
Keyword: 
single-flux-quantum (SFQ) circuitadderhardware algorithm
 Summary | Full Text:PDF(274.2KB)

A Hardware Algorithm for Integer Division Using the SD2 Representation
Naofumi TAKAGI Shunsuke KADOWAKI Kazuyoshi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/10/01
Vol. E89-A  No. 10 ; pp. 2874-2881
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmeticdivisioninteger divisionhardware algorithmsigned-digit representationVLSI
 Summary | Full Text:PDF(377.5KB)

Hardware Algorithm for Computing Reciprocal of Euclidean Norm of a 3-D Vector
Fumio KUMAZAWA Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/06/01
Vol. E89-A  No. 6 ; pp. 1799-1806
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmetichardware algorithmreciprocal of the Euclidean normdigit-recurrencecomputer graphics
 Summary | Full Text:PDF(260.2KB)

A Hardware Algorithm for Modular Multiplication/Division Based on the Extended Euclidean Algorithm
Marcelo E. KAIHARA Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3610-3617
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
modular arithmeticmodular multiplicationmodular divisionMontgomery multiplicationextended Euclidean algorithmhardware algorithm
 Summary | Full Text:PDF(208KB)

Digit-Recurrence Algorithm for Computing Reciprocal Square-Root
Naofumi TAKAGI Daisuke MATSUOKA Kazuyoshi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/01/01
Vol. E86-A  No. 1 ; pp. 221-228
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmeticreciprocal square-roothardware algorithmdigit-recurrencecomputer graphics
 Summary | Full Text:PDF(229.7KB)

A VLSI Algorithm for Division in GF(2m) Based on Extended Binary GCD Algorithm
Yasuaki WATANABE Naofumi TAKAGI Kazuyoshi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/05/01
Vol. E85-A  No. 5 ; pp. 994-999
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
finite field arithmeticdivision in finite fieldhardware algorithmVLSI algorithm
 Summary | Full Text:PDF(234.2KB)

A Digit-Recurrence Algorithm for Cube Rooting
Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/05/01
Vol. E84-A  No. 5 ; pp. 1309-1314
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmeticcube rootinghardware algorithmdigit-recurrence algorithmVLSI
 Summary | Full Text:PDF(255.2KB)

A Built-in Self-Reconfigurable Scheme for 3D Mesh Arrays
Itsuo TAKANAMI Tadayoshi HORITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/12/25
Vol. E82-D  No. 12 ; pp. 1554-1562
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
fault tolerancereconstructionthree-dimensional mesh arrayself-reconstructionhardware algorithm
 Summary | Full Text:PDF(40KB)

A Novel Computationally Adaptive Hardware Algorithm for Video Motion Estimation
Vasily G. MOSHNYAGA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Vol. E82-C  No. 9 ; pp. 1749-1754
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Imaging Circuits and Algorithms
Keyword: 
video processingmotion estimationhardware algorithmVLSI architecture
 Summary | Full Text:PDF(485.9KB)

A VLSI Algorithm for Modular Division Based on the Binary GCD Algorithm
Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/05/25
Vol. E81-A  No. 5 ; pp. 724-728
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
modular arithmeticmodular divisionGCDhardware algorithmredundant representation
 Summary | Full Text:PDF(379.3KB)

A Hardware Algorithm for Modular Division Based on the Extended Euclidean Algorithm
Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/11/25
Vol. E79-D  No. 11 ; pp. 1518-1522
Type of Manuscript:  PAPER
Category: Computer Hardware and Design
Keyword: 
Euclidean algorithmhardware algorithmmodular arithmeticmodular divisionredundant representation
 Summary | Full Text:PDF(404.8KB)

A Modular Inversion Hardware Algorithm with a Redundant Binary Representation
Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/08/25
Vol. E76-D  No. 8 ; pp. 863-869
Type of Manuscript:  PAPER
Category: Computer Hardware and Design
Keyword: 
computer arithmeticcomputer cryptographgreatest common divisor (GCD)hardware algorithmmodular arithmetic
 Summary | Full Text:PDF(532.9KB)