Keyword : embedded system


A New Method of Storing Integral Image for Memory Efficiency Using Modified Block Structure
Su-hyun LEE Yong-jin JEONG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/10/01
Vol. E98-D  No. 10 ; pp. 1888-1891
Type of Manuscript:  LETTER
Category: Image Processing and Video Processing
Keyword: 
integral imageimage processingimage recognitionembedded system
 Summary | Full Text:PDF(351KB)

A New Integral Image Structure for Memory Size Reduction
Su-hyun LEE Yong-jin JEONG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/04/01
Vol. E97-D  No. 4 ; pp. 998-1000
Type of Manuscript:  LETTER
Category: Image Processing and Video Processing
Keyword: 
integral imageimage processingimage recognitionembedded system
 Summary | Full Text:PDF(511.3KB)

Robust Lightweight Embedded Virtualization Layer Design with Simple Hardware Assistance
Tsung-Han LIN Yuki KINEBUCHI Tatsuo NAKAJIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12 ; pp. 2821-2832
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer System and Services
Keyword: 
operating systemembedded systemvirtualizationlocal memoryscratch-pad memory
 Summary | Full Text:PDF(699.8KB)

Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems
Yukun LIU Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/09/01
Vol. E94-D  No. 9 ; pp. 1792-1799
Type of Manuscript:  PAPER
Category: Pattern Recognition
Keyword: 
fingerprint recognitionorientation fieldbinary patternembedded system
 Summary | Full Text:PDF(1MB)

Improved Dictionary-Based Code-Compression Schemes with XOR Reference for RISC/VLIW Architecture
Jui-Chun CHEN Chang-Hong LIN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2517-2523
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
dictionary-based code-compressionembedded system
 Summary | Full Text:PDF(1MB)

A Parallel Branching Program Machine for Sequential Circuits: Implementation and Evaluation
Hiroki NAKAHARA Tsutomu SASAO Munehiro MATSUURA Yoshifumi KAWAMURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8 ; pp. 2048-2058
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Logic Design
Keyword: 
embedded systembranching program machinemulti-processingBDD
 Summary | Full Text:PDF(1MB)

A Concurrent Instruction Scheduling and Recoding Algorithm for Power Minimization in Embedded Systems
Sung-Rae LEE Ser-Hoon LEE Sun-Young HWANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8 ; pp. 2162-2171
Type of Manuscript:  PAPER
Category: Software System
Keyword: 
embedded systemlow-powerinstruction schedulingrecoding
 Summary | Full Text:PDF(1.5MB)

A Two-Level Cache Design Space Exploration System for Embedded Applications
Nobuaki TOJO Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12 ; pp. 3238-3247
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
two-level cacheL1/L2cache optimizationdesign space explorationcache simulationembedded system
 Summary | Full Text:PDF(522.3KB)

Multi-Core/Multi-IP Technology for Embedded Applications
Naohiko IRIE Toshihiro HATTORI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/10/01
Vol. E92-C  No. 10 ; pp. 1232-1239
Type of Manuscript:  INVITED PAPER (Special Section on Hardware and Software Technologies on Advanced Microprocessors)
Category: 
Keyword: 
SoCmulti-coreembedded systemplatform
 Summary | Full Text:PDF(2MB)

An L1 Cache Design Space Exploration System for Embedded Applications
Nobuaki TOJO Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/06/01
Vol. E92-A  No. 6 ; pp. 1442-1453
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
cachecache optimizationdesign space explorationcache simulationembedded system
 Summary | Full Text:PDF(1.1MB)

Low Cost Time Synchronization Protocol for Wireless Sensor Network
Ki-Hyeon KIM Won-Kee HONG Hie-Cheol KIM 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2009/04/01
Vol. E92-B  No. 4 ; pp. 1137-1143
Type of Manuscript:  Special Section PAPER (Special Section on Internet Technology and its Architecture for Ambient Information Systems)
Category: 
Keyword: 
time synchronizationWSNembedded systemwireless communicationmobile network
 Summary | Full Text:PDF(393.5KB)

Design and Evaluation of Data-Dependent Hardware for AES Encryption Algorithm
Ryoichiro ATONO Shuichi ICHIKAWA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2006/07/01
Vol. E89-D  No. 7 ; pp. 2301-2305
Type of Manuscript:  LETTER
Category: VLSI Systems
Keyword: 
FPGAcustom circuitpartial evaluationspecializationcryptographyembedded system
 Summary | Full Text:PDF(115.1KB)

A Low Power-Consuming Embedded System Design by Reducing Memory Access Frequencies
Ching-Wen CHEN Chih-Hung CHANG Chang-Jung KU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/12/01
Vol. E88-D  No. 12 ; pp. 2748-2756
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
embedded systemcode compresspower consumptionperformance
 Summary | Full Text:PDF(809.9KB)

Transient Bit Error Recovery Scheme for ROM-Based Embedded Systems
Sang-Moon RYU Dong-Jo PARK 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/09/01
Vol. E88-D  No. 9 ; pp. 2209-2212
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
transient bit errormemory scrubbingreliabilityembedded system
 Summary | Full Text:PDF(94KB)

Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems
Yukio MITSUYAMA Motoki KIMURA Takao ONOYE Isao SHIRAKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/04/01
Vol. E88-A  No. 4 ; pp. 899-906
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
IEEE802.11iWEPTKIPAES-CCMembedded systemlow hardware cost
 Summary | Full Text:PDF(937.7KB)

Web-Based Monitoring and Control for BAS Using Multi-Protocol Converter with Embedded Linux
Byoung Wook CHOI Kyoung Chul KOH Soo Yeong YI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/03/01
Vol. E88-C  No. 3 ; pp. 450-457
Type of Manuscript:  PAPER
Category: Electronic Instrumentation and Control
Keyword: 
remote monitoring and controlWeb-based controlembedded systemLonWorks networkBAS
 Summary | Full Text:PDF(1.5MB)

Binary Line-Pattern Algorithm for Embedded Fingerprint Authentication System
Jinqing QI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/08/01
Vol. E87-A  No. 8 ; pp. 1879-1886
Type of Manuscript:  Special Section PAPER (Special Section on Digital Signal Processing)
Category: Image/Visual Signal Processing
Keyword: 
fingerprint authenticationline-patternembedded system
 Summary | Full Text:PDF(1.9MB)

Fast Fingerprint Classification Based on Direction Pattern
Jinqing QI Dongju LI Tsuyoshi ISSHIKI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/08/01
Vol. E87-A  No. 8 ; pp. 1887-1892
Type of Manuscript:  Special Section PAPER (Special Section on Digital Signal Processing)
Category: Image/Visual Signal Processing
Keyword: 
fingerprint classificationdirection patternembedded system
 Summary | Full Text:PDF(428.2KB)

Performance Estimation at Architecture Level for Embedded Systems
Hiroshi MIZUNO Hiroyuki KOBAYASHI Takao ONOYE Isao SHIRAKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12 ; pp. 2636-2644
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Performance Estimation
Keyword: 
power dissipationarchitectureembedded systemco-design
 Summary | Full Text:PDF(800.7KB)

A System Level Optimization Technique for Application Specific Low Power Memories
Tohru ISHIHARA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11 ; pp. 2755-2761
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Optimization of Power and Timing
Keyword: 
low power designhardware/software codesignmemorylow voltageembedded system
 Summary | Full Text:PDF(557.2KB)

Register Constraint Analysis to Minimize Spill Code for Application Specific DSPs
Tatsuo WATANABE Nagisa ISHIURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/06/01
Vol. E84-A  No. 6 ; pp. 1541-1544
Type of Manuscript:  Special Section LETTER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000))
Category: 
Keyword: 
application specific DSPspill code insertionembedded systemschedulingregister constraint analysis
 Summary | Full Text:PDF(588.6KB)

Towards the System LSI Design Technology
Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/01/01
Vol. E84-A  No. 1 ; pp. 91-97
Type of Manuscript:  INVITED PAPER (Special Section on the 10th Anniversary of the IEICE Transactions of Fundamentals: "Last Decade and 21st Century")
Category: 
Keyword: 
system LSIsystem on a chipembedded systemsoft-core processor
 Summary | Full Text:PDF(377.6KB)

Multicriteria Codesign Optimization for Embedded Multimedia Communication System
I-Horng JENG Feipei LAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12 ; pp. 2474-2487
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Co-design and High-level Synthesis
Keyword: 
hardware/software codesignmulticriteria optimizationembedded systemmultimedia communicationsinformation appliance
 Summary | Full Text:PDF(886.4KB)

A Memory Power Optimization Technique for Application Specific Embedded Systems
Tohru ISHIHARA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11 ; pp. 2366-2374
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
low power designhardware/software codesignmemoryembedded system
 Summary | Full Text:PDF(1.3MB)

Polling-Based Real-Time Software for MPEG2 System Protocol LSIs
Jiro NAGANUMA Makoto ENDO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5 ; pp. 695-701
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: 
Keyword: 
MPEG2protocol processingmultiplexer/demultiplexerreal-time softwareembedded systemHW/SW co-designVLSI
 Summary | Full Text:PDF(648.1KB)

A Method for Design of Embedded Systems for Multimedia Applications
Katsuhiko SEO Hisao KOIZUMI Barry SHACKLEFORD Masashi MORI Takashi KUSUHARA Hirotaka KIMURA Fumio SUZUKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5 ; pp. 725-732
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: 
Keyword: 
co-verificationco-designco-simulationco-emulationembedded systemcomponent logical bus
 Summary | Full Text:PDF(907.5KB)

Top-Down Co-simulation of Hardware/Software Co-designs for Embedded Systems Based Upon a Component Logical Bus Architecture
Katsuhiko SEO Hisao KOIZUMI Barry SHACKLEFORD Mitsuhiro YASUDA Masashi MORI Fumio SUZUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1834-1841
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
co-designco-simulationembedded systemcomponent logical bus
 Summary | Full Text:PDF(728.4KB)