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Keyword : duty cycle

The Active Control Design for Hybrid DMFC System Based on Fuzzy Logic Chi-Yuan CHANG Koan-Yuh CHANG Wen-June WANG Charn-Ying CHEN
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2011/11/01 Vol. E94-B No. 11 pp. 2994-3000 Type of Manuscript: PAPER Category: Energy in Electronics Communications Keyword: DMFC, fuzzy logic, duty cycle, DC/DC converter, fuel efficiency,
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Traffic Adaptive MAC Mechanism for IEEE 802.15.4 Cluster Based Wireless Sensor Networks with Various Traffic Non-uniformities Mario ARZAMENDIA Kazuo MORI Katsuhiro NAITO Hideo KOBAYASHI
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2010/11/01 Vol. E93-B No. 11 pp. 3035-3047 Type of Manuscript: PAPER Category: Network Keyword: Wireless Sensor Networks, IEEE 802.15.4, MAC layer, duty cycle, traffic adaptation, traffic non-uniformity,
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A Pseudo Fractional-N Clock Generator with 50% Duty Cycle Output Wei-Bin YANG Yu-Lung LO Ting-Sheng CHAO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/03/01 Vol. E93-C No. 3 pp. 309-316 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: fractional-N, clock generator, pseudo fractional-N controller, duty cycle,
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Duty Cycle Corrector for Pipelined ADC with Low Added Jitter Zhengchang DU Jianhui WU Shanli LONG Meng ZHANG Xincun JI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/06/01 Vol. E92-C No. 6 pp. 864-866 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: duty cycle, pipelined ADC, continuous-time integrator, low added jitter,
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An Adaptive Superframe Structure Algorithm for IEEE 802.15.4 WPANs Changle LI Huan-Bang LI Ryuji KOHNO
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2008/12/01 Vol. E91-B No. 12 pp. 4006-4008 Type of Manuscript: LETTER Category: Network Keyword: IEEE 802.15.4, WPAN, superframe, duty cycle,
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All-Digital Clock Deskew Buffer with Variable Duty Cycles Shao-Ku KAO Shen-Iuan LIU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/06/01 Vol. E89-C No. 6 pp. 753-760 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: skew, duty cycle, pulsewidth detector, time-to-digital conversion,
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A Novel False Lock Detection Technique for a Wide Frequency Range Delay-Locked Loop Yasutoshi AIBARA Eiki IMAIZUMI Hiroaki TAKAGISHI Tatsuji MATSUURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/02/01 Vol. E89-A No. 2 pp. 385-390 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: delay-locked loop (DLL), false lock, frequency range, duty cycle, digital camera,
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