Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-ANo. 12pp. 2509-2516 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: system-level design,
hardware sharing,
design space exploration,
MPSoC,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12pp. 3238-3247 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: two-level cache,
L1/L2,
cache optimization,
design space exploration,
cache simulation,
embedded system,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12pp. 3258-3267 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: partial forwarding,
instruction scheduling,
compiler,
design space exploration,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12pp. 3193-3202 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Embedded, Real-Time and Reconfigurable Systems Keyword: design space exploration,
system-on-a-chip (SoC),
SystemC,
UML,
3D graphics,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/06/01 Vol. E92-ANo. 6pp. 1442-1453 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: cache,
cache optimization,
design space exploration,
cache simulation,
embedded system,
An Efficient Method for System-Level Exploration of Global Optimum in a Parameterized ASIP Design Yeong-Geol KIMTag-Gon KIM
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-ANo. 12pp. 3297-3302 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: design space exploration,
global optimization,
parameterized ASIP,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-ANo. 12pp. 2586-2595 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Hardware/Software Codesign Keyword: compiler generation,
ASIP,
design space exploration,
