Keyword : delay fault

A Design Scheme for Delay Testing of Controllers Using State Transition Information
Tsuyoshi IWAGAKI  Satoshi OHTAKE  Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12  pp. 3200-3207
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test
Keyword: 
controller,  delay fault,  non-scan design,  invalid test state and transition generator,  at-speed test, 
  Summary |  Full Text:PDF (463.5KB)
Delay Fault Testing for CMOS Iterative Logic Arrays with a Constant Number of Patterns
Shyue-Kung LU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/12/01
Vol. E86-D  No. 12  pp. 2659-2665
Type of Manuscript: Special Section PAPER (Special Issue on Dependable Computing)
Category: Test
Keyword: 
delay fault,  Iterative Logic Array,  C-testable,  bijection, 
  Summary |  Full Text:PDF (740.8KB)