Keyword : data-path synthesis


Assignment-Driven Loop Pipeline Scheduling and Its Application to Data-Path Synthesis
Toshiyuki YOROZUYA Koji OHASHI Mineo KANEKO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4 ; pp. 819-826
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
data-path synthesisresource assignmentloop pipeline schedulingdependence graphdisjunctive arc
 Summary | Full Text:PDF(523KB)

Memory Sharing Processor Array (MSPA) Architecture
Dongju LI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/12/25
Vol. E79-A  No. 12 ; pp. 2086-2096
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
processor arraydata-path synthesissystolic array
 Summary | Full Text:PDF(833.2KB)

Automatic Synthesis of a Serial Input Multiprocessor Array
Dongji LI Hiroaki KUNIEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/12/25
Vol. E79-A  No. 12 ; pp. 2097-2105
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
processor arraydata-path synthesisserial interfacemultiplier
 Summary | Full Text:PDF(724.3KB)