Keyword : computer arithmetic


Low-Latency Low-Cost Architecture for Square and Cube Roots
Jihyuck JO In-Cheol PARK 
Publication:   
Publication Date: 2017/09/01
Vol. E100-A  No. 9 ; pp. 1951-1955
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
computer arithmeticcube rootssquare rootsnon-iterative root calculation
 Summary | Full Text:PDF(729.4KB)

Multiplier-less and Table-less Linear Approximation for Square-Related Functions
In-Cheol PARK Tae-Hwan KIM 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/11/01
Vol. E93-D  No. 11 ; pp. 2979-2988
Type of Manuscript:  PAPER
Category: Fundamentals of Information Systems
Keyword: 
squaresquare-rootinverse squareinverse square-rootcomputer arithmeticapproximationlinear interpolation
 Summary | Full Text:PDF(783.3KB)

Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {22n, 2n -1, 2n+1 -1} and {22n, 2n -1, 2n-1 -1}
Amir Sabbagh MOLAHOSSEINI Chitra DADKHAH Keivan NAVI Mohammad ESHGHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2009/09/01
Vol. E92-D  No. 9 ; pp. 1628-1638
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
residue to binary convertermixed-radix conversion (MRC)residue number system (RNS)computer arithmetic
 Summary | Full Text:PDF(986.6KB)

A Hardware Algorithm for Integer Division Using the SD2 Representation
Naofumi TAKAGI Shunsuke KADOWAKI Kazuyoshi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/10/01
Vol. E89-A  No. 10 ; pp. 2874-2881
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmeticdivisioninteger divisionhardware algorithmsigned-digit representationVLSI
 Summary | Full Text:PDF(377.5KB)

Hardware Algorithm for Computing Reciprocal of Euclidean Norm of a 3-D Vector
Fumio KUMAZAWA Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/06/01
Vol. E89-A  No. 6 ; pp. 1799-1806
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmetichardware algorithmreciprocal of the Euclidean normdigit-recurrencecomputer graphics
 Summary | Full Text:PDF(260.2KB)

Digit-Recurrence Algorithm for Computing Reciprocal Square-Root
Naofumi TAKAGI Daisuke MATSUOKA Kazuyoshi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/01/01
Vol. E86-A  No. 1 ; pp. 221-228
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmeticreciprocal square-roothardware algorithmdigit-recurrencecomputer graphics
 Summary | Full Text:PDF(229.7KB)

Design of the Floating-Point Adder Supporting the Format Conversion and the Rounding Operations with Simultaneous Rounding Scheme
Woo-Chan PARK Cheol-Ho JEONG Tack-Don HAN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/08/01
Vol. E85-D  No. 8 ; pp. 1341-1345
Type of Manuscript:  LETTER
Category: Computer System Element
Keyword: 
computer arithmeticfloating-point unitfloating-point adder
 Summary | Full Text:PDF(398.9KB)

Design of High-Radix VLSI Dividers without Quotient Selection Tables
Takafumi AOKI Kimihiko NAKAZAWA Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11 ; pp. 2623-2631
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Design
Keyword: 
computer arithmeticSRT divisionhigh-radix divisionsigned-digit number systemsVLSI
 Summary | Full Text:PDF(1.2MB)

A Digit-Recurrence Algorithm for Cube Rooting
Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/05/01
Vol. E84-A  No. 5 ; pp. 1309-1314
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
computer arithmeticcube rootinghardware algorithmdigit-recurrence algorithmVLSI
 Summary | Full Text:PDF(255.2KB)

Evolutionary Synthesis of Fast Constant-Coefficient Multipliers
Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/09/25
Vol. E83-A  No. 9 ; pp. 1767-1777
Type of Manuscript:  PAPER
Category: Nonlinear Problems
Keyword: 
circuit designcomputer arithmeticarithmetic circuitsevolvable hardwareevolutionary computation
 Summary | Full Text:PDF(982.5KB)

Radix-2-4-8 CORDIC for Fast Vector Rotation
Takafumi AOKI Ichiro KITAORI Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/06/25
Vol. E83-A  No. 6 ; pp. 1106-1114
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99))
Category: 
Keyword: 
computer arithmeticarithmetic circuitsCORDICVLSIdigital signal processing
 Summary | Full Text:PDF(1.2MB)

Signed-Weight Arithmetic and Its Application to a Field-Programmable Digital Filter Architecture
Takafumi AOKI Yoshiki SAWADA Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Vol. E82-C  No. 9 ; pp. 1687-1698
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Configurable Computing and Fault Tolerance
Keyword: 
computer arithmeticredundant number systemsdigital signal processingFIR filterFPGAs
 Summary | Full Text:PDF(2.7MB)

Evolutionary Design of Arithmetic Circuits
Takafumi AOKI Naofumi HOMMA Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/05/25
Vol. E82-A  No. 5 ; pp. 798-806
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
circuit designcomputer arithmeticarithmetic circuitsevolvable hardwareevolutionary computation
 Summary | Full Text:PDF(758.6KB)

Floating-Point Divide Operation without Special Hardware Supports
Takashi AMISAKI Umpei NAGASHIMA Kazutoshi TANABE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/01/25
Vol. E82-A  No. 1 ; pp. 173-177
Type of Manuscript:  LETTER
Category: Numerical Analysis and Optimization
Keyword: 
computer arithmeticdivisionFPUerror analysisspecial-purpose
 Summary | Full Text:PDF(103.2KB)

A Modular Inversion Hardware Algorithm with a Redundant Binary Representation
Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/08/25
Vol. E76-D  No. 8 ; pp. 863-869
Type of Manuscript:  PAPER
Category: Computer Hardware and Design
Keyword: 
computer arithmeticcomputer cryptographgreatest common divisor (GCD)hardware algorithmmodular arithmetic
 Summary | Full Text:PDF(532.9KB)