Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/03/20
Vol. E79-A
No. 3
pp. 312-320
Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
Category:
Keyword:
VLSI CAD,
logic synthesis,
complex-gate,
transistor sizing,
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