Keyword : circuit design


FPS-RAM: Fast Prefix Search RAM-Based Hardware for Forwarding Engine
Kazuya ZAITSU Koji YAMAMOTO Yasuto KURODA Kazunari INOUE Shingo ATA Ikuo OKA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/07/01
Vol. E95-B  No. 7 ; pp. 2306-2314
Type of Manuscript:  PAPER
Category: Network System
Keyword: 
IP routeraddress lookupternary content addressable memory (TCAM)power consumptionfield programmable gate array (FPGA)circuit design
 Summary | Full Text:PDF(1.5MB)

A High Impedance Current Source Using Active Resistor
Takeshi KOIKE Hiroki SATO Akira HYOGO Keitaro SEKINE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6 ; pp. 1315-1317
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
current sourcehigh impedanceCMOScircuit design
 Summary | Full Text:PDF(238.1KB)

A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications
Konstantinos SIOZIOS George KOUTROUMPEZIS Konstantinos TATAS Nikolaos VASSILIADIS Vasilios KALENTERIDIS Haroula POURNARA Ilias PAPPAS Dimitrios SOUDRIS Antonios THANAILAKIS Spiridon NIKOLAIDIS Stilianos SISKOS 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7 ; pp. 1369-1380
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Programmable Logic, VLSI, CAD and Layout
Keyword: 
FPGAcircuit designCAD toolsRTL designconfiguration bitstream
 Summary | Full Text:PDF(1.3MB)

Evolutionary Synthesis of Fast Constant-Coefficient Multipliers
Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/09/25
Vol. E83-A  No. 9 ; pp. 1767-1777
Type of Manuscript:  PAPER
Category: Nonlinear Problems
Keyword: 
circuit designcomputer arithmeticarithmetic circuitsevolvable hardwareevolutionary computation
 Summary | Full Text:PDF(982.5KB)

A Novel Layout Optimization Technique for Miniaturization and Accurate Design of MMICs
Shin CHAKI Yoshinobu SASAKI Naoto ANDOH Yasuharu NAKAJIMA Kazuo NISHITANI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/11/25
Vol. E82-C  No. 11 ; pp. 1960-1967
Type of Manuscript:  INVITED PAPER (Special Issue on High-Frequency/High-Speed Devices for Information and Communication Systems in the 21st Century)
Category: Low Power-Consumption RF ICs
Keyword: 
MMICcircuit designminiaturizationlayout optimizationelectromagnetic analysisSAMFETLNA
 Summary | Full Text:PDF(1.7MB)

Evolutionary Design of Arithmetic Circuits
Takafumi AOKI Naofumi HOMMA Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/05/25
Vol. E82-A  No. 5 ; pp. 798-806
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
circuit designcomputer arithmeticarithmetic circuitsevolvable hardwareevolutionary computation
 Summary | Full Text:PDF(758.6KB)

Parallel Encoder and Decoder Architecture for Cyclic Codes
Tomoko K. MATSUSHIMA Toshiyasu MATSUSHIMA Shigeichi HIRASAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/09/25
Vol. E79-A  No. 9 ; pp. 1313-1323
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: Coding Theory
Keyword: 
error correctioncyclic codeparallel architecturecircuit designencoderdecoder
 Summary | Full Text:PDF(772.7KB)

High Speed GaAs Digital Integrated Circuits
Masahiro AKIYAMA Seiji NISHI Yasushi KAWAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9 ; pp. 1165-1170
Type of Manuscript:  INVITED PAPER (Special Issue on Ultra-High-Speed Electron Devices)
Category: 
Keyword: 
GaAs digital ICDCFLSBFLhigh speedlow powerself-alignment processrecessed gate processcircuit designstandard cell
 Summary | Full Text:PDF(534.1KB)

Design of High Speed 88-Port Self-Routing Switch on Multi-Chip Module
Hiroshi YASUKAWA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1993/11/25
Vol. E76-B  No. 11 ; pp. 1474-1477
Type of Manuscript:  LETTER
Category: Optical Communication
Keyword: 
self-routing switchmulti-stage networkcircuit designclock distributionMCM
 Summary | Full Text:PDF(329.2KB)

A 1/2 Frequency Divider Using Resonant-Tunneling Hot Electron Transistors (RHETs)
Motomu TAKATSU Kenichi IMAMURA Hiroaki OHNISHI Toshihiko MORI Takami ADACHIHARA Shunichi MUTO Naoki YOKOYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/08/25
Vol. E75-C  No. 8 ; pp. 918-921
Type of Manuscript:  Special Section PAPER (Special Issue on Cryogenic Microwave Devices)
Category: Active Devices
Keyword: 
resonant-tunnelinghot electron rtansistorfrequency dividercircuit designoperation test
 Summary | Full Text:PDF(499.8KB)