Keyword : built-in self-test (BIST)


A Low-Cost Bit-Error-Rate BIST Circuit for High-Speed ADCs Based on Gray Coding
Ya-Ting SHYU Ying-Zu LIN Rong-Sing CHU Guan-Ying HUANG Soon-Jyh CHANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12 ; pp. 2415-2423
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
built-in self-test (BIST)bit error rate (BER)analog-to-digital converter (ADC)
 Summary | Full Text:PDF(2.5MB)

Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach
Hyeonuk SON Incheol KIM Sang-Goog LEE Jin-Ho AHN Jeong-Do KIM Sungho KANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/08/01
Vol. E94-C  No. 8 ; pp. 1344-1347
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
digital-to-analogue converter (DAC)built-in self-test (BIST)noise-immunitystatic testing
 Summary | Full Text:PDF(573.2KB)

A Low Power Test Pattern Generator for BIST
Shaochong LEI Feng LIANG Zeye LIU Xiaoying WANG Zhen WANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/05/01
Vol. E93-C  No. 5 ; pp. 696-702
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
built-in self-test (BIST)powersingle input change (SIC)fault coverage
 Summary | Full Text:PDF(1MB)

An Efficient Fault Syndromes Simulator for SRAM Memories
Wan Zuha WAN HASAN Izhal ABD HALIN Roslina MOHD SIDEK Masuri OTHMAN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/05/01
Vol. E92-C  No. 5 ; pp. 639-646
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
testingdiagnosiscoupling faultsstuck-at faults March test algorithmbuilt-in self-test (BIST)built-in self-diagnosis (BISD)automated march-based test algorithmSRAM
 Summary | Full Text:PDF(1.8MB)

A Single Input Change Test Pattern Generator for Sequential Circuits
Feng LIANG ShaoChong LEI ZhiBiao SHAO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/08/01
Vol. E91-C  No. 8 ; pp. 1365-1370
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
built-in self-test (BIST)single input change (SIC) sequenceseedsequential circuit
 Summary | Full Text:PDF(341.7KB)

OTA-C Based BIST Structure for Analog Circuits
Cheng-Chung HSU Wu-Shiung FENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/04/25
Vol. E83-A  No. 4 ; pp. 771-773
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
built-in self-test (BIST)operational transconductance amplifier (OTA)analog circuitfault diagnosistesting
 Summary | Full Text:PDF(642.8KB)

Design of Autonomous TPG Circuits for Use in Two-Pattern Testing
Kiyoshi FURUYA Seiji SEKI Edward J. McCLUSKEY 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7 ; pp. 882-888
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
built-in self-test (BIST)two-pattern testpseudorandom pattern generatorautonomous linear sequential circuittransition coverage
 Summary | Full Text:PDF(549KB)

Stuck-Open Fault Detectabilities of Various TPG Circuits for Use in Two-Pattern Testing
Kiyoshi FURUYA Susumu YAMAZAKI Masayuki SATO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7 ; pp. 889-894
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
built-in self-test (BIST)two-pattern testfault coveragetransition coverage
 Summary | Full Text:PDF(498.9KB)