Keyword : buffer


A Theoretical Study of the Performance of a Single-Electron Transistor Buffer
Mohammad Javad SHARIFI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6 ; pp. 1105-1111
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
single electron transistorensemble Monte Carlo methodbufferdelay-error behaviorlogic gates
 Summary | Full Text:PDF(484.2KB)

A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC
Shunsuke OKURA Tetsuro OKURA Bogoda A. INDIKA U.K. Kenji TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/02/01
Vol. E90-A  No. 2 ; pp. 358-364
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
CMOSimagercolumn-parallel ADCRAM bankDFFlatchbufferenergy efficient
 Summary | Full Text:PDF(508.1KB)

Growth of Epitaxial SrTiO3 on Epitaxial (Ti,Al)N/Si(100) Substrate Using Ti-Buffer Layer
Kenya SANO Ryoichi OHARA Takashi KAWAKUBO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/06/01
Vol. E84-C  No. 6 ; pp. 808-813
Type of Manuscript:  Special Section PAPER (Special Issue on Nonvolatile Memories)
Category: FeRAMs
Keyword: 
titaniumbufferSrTiO3epitaxial growthSi(100)
 Summary | Full Text:PDF(728.6KB)

Architectural Choices in Large Scale ATM Switches
Jonathan TURNER Naoaki YAMANAKA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/02/25
Vol. E81-B  No. 2 ; pp. 120-137
Type of Manuscript:  INVITED PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: 
Keyword: 
ATMswitchB-ISDNbufferarchitecture
 Summary | Full Text:PDF(1.7MB)

A High-Speed Tandem-Crosspoint ATM Switch Architecture with Input and Output Buffers
Eiji OKI Naoaki YAMANAKA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/02/25
Vol. E81-B  No. 2 ; pp. 215-223
Type of Manuscript:  Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: ATM switching architecture
Keyword: 
ATMswitchhigh-speedcrosspointbuffer
 Summary | Full Text:PDF(741.8KB)

A High-Speed ATM Switch that Uses a Simple Retry Algorithm and Small Input Buffers
Kouichi GENOA Naoaki YAMANAKA Yukihiro DOI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1993/07/25
Vol. E76-B  No. 7 ; pp. 726-730
Type of Manuscript:  Special Section LETTER (Special Section of Letters Selected from the 1992 IEICE Fall Conference and the 1993 IEICE Spring Conference)
Category: 
Keyword: 
ATMswitchcell loss probabilitybufferarbitration
 Summary | Full Text:PDF(390.8KB)