Keyword : boundary constraints

VLSI Floorplanning with Boundary Constraints Based on Single-Sequence Representation
Kang LI  Juebang YU  Jian LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/09/01
Vol. E92-A  No. 9  pp. 2369-2375
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
Keyword: 
VLSI physical design,  floorplan/placement,  boundary constraints,  single-sequence, 
  Summary |  Full Text:PDF
VLSI Floorplanning with Boundary Constraints Using Corner Block List Representation
Yuchun MA  Xianlong HONG  Sheqin DONG  Yici CAI  Chung-Kuan CHENG  Jun GU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11  pp. 2697-2704
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout
Keyword: 
floorplan,  corner block list,  simulated annealing,  boundary constraints, 
  Summary |  Full Text:PDF