Keyword : binary decision diagrams (BDDs)


Logic Synthesis Method for Dual-Rail RSFQ Digital Circuits Using Root-Shared Binary Decision Diagrams
Koji OBATA Kazuyoshi TAKAGI Naofumi TAKAGI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/01/01
Vol. E90-A  No. 1 ; pp. 257-266
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
logic synthesisdual-railRSFQbinary decision diagrams (BDDs)
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