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Keyword : System-on-Chip
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µI/O Architecture: A Power-Aware Interconnect Circuit Design for SoC and SiP
Yusuke KANNO
Hiroyuki MIZUNO
Nobuhiro OODAIRA
Yoshihiko YASU
Kazumasa YANAGISAWA
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Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C
No. 4
pp. 589-597
Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category:
Keyword:
low-cost,
System-on-Chip,
SoC,
System-in-Package,
SiP,
hierarchical I/O design,
signal-level converter,
signal wall function,
low-power,
interconnect circuit,
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