Keyword : SAR ADC


Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations
Shoji KAWAHITO 
Publication:   
Publication Date: 2018/07/01
Vol. E101-C  No. 7 ; pp. 444-456
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
CMOS image sensorcolumn-parallel ADCcyclic ADCdelta-sigma modulationsingle-slope ADCSAR ADCfigure of merit
 Summary | Full Text:PDF(1.4MB)

A Noise Coupled ΔΣAD Modulator Using Passive Adder Embedded Noise Shaping SAR Quantizer
Chunhui PAN Hao SAN 
Publication:   
Publication Date: 2018/07/01
Vol. E101-C  No. 7 ; pp. 480-487
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
ΔΣAD modulatorSAR ADCnoise coupling
 Summary | Full Text:PDF(1.3MB)

High Resolution Mixed-Domain Delta-Sigma Time-to-Digital Converter Using Compensated Charge-Pump Integrator
Anugerah FIRDAUZI Zule XU Masaya MIYAHARA Akira MATSUZAWA 
Publication:   
Publication Date: 2017/06/01
Vol. E100-C  No. 6 ; pp. 548-559
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
charge-pumpdelta-sigmaSAR ADCtime-to-digital converter
 Summary | Full Text:PDF(2.3MB)

A 9.35-ENOB, 14.8 fJ/conv.-step Fully-Passive Noise-Shaping SAR ADC
Zhijie CHEN Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C  No. 8 ; pp. 963-973
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
fully passive noise shapingcharge-redistributionSAR ADCnoise transfer functionzerospoles
 Summary | Full Text:PDF(2.7MB)

Fully Passive Noise Shaping Techniques in a Charge-Redistribution SAR ADC
Zhijie CHEN Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6 ; pp. 623-631
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
fully passiveSAR ADC1st order noise shaping2nd order noise shapingcharge-redistributionnoise transfer function
 Summary | Full Text:PDF(663.8KB)

Design for Testability That Reduces Linearity Testing Time of SAR ADCs
Tomohiko OGAWA Haruo KOBAYASHI Satoshi UEMORI Yohei TAN Satoshi ITO Nobukazu TAKAI Takahiro J. YAMAGUCHI Kiichi NIITSU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6 ; pp. 1061-1064
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
SAR ADCtestingDC linearitydesign for testabilitybuilt-in self-test
 Summary | Full Text:PDF(462.8KB)

SAR ADC Algorithm with Redundancy and Digital Error Correction
Tomohiko OGAWA Haruo KOBAYASHI Yosuke TAKAHASHI Nobukazu TAKAI Masao HOTTA Hao SAN Tatsuji MATSUURA Akira ABE Katsuyoshi YAGI Toshihiko MORI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2 ; pp. 415-423
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
SAR ADCdigital error correctionnon-binaryredundancy
 Summary | Full Text:PDF(632.9KB)