Keyword : MOS analog circuit


An Equivalent MOSFET Cell Using Adaptively Biased Source-Coupled Pair
Hiroki SATO Akira HYOGO Keitaro SEKINE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/02/01
Vol. E86-A  No. 2 ; pp. 357-363
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
MOS analog circuitthreshold voltagesource-coupled pairadaptively bias technique
 Summary | Full Text:PDF(840.7KB)

A Phase Compensation Technique without Capacitors for the CMOS Circuit with a Very Low Impedance Terminal
Eitake IBARAGI Akira HYOGO Keitaro SEKINE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/02/25
Vol. E83-A  No. 2 ; pp. 236-242
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog signal processingMOS analog circuitphase compensationlow impedance
 Summary | Full Text:PDF(432.6KB)

A Very High Output Impedance Tail Current Source for Low Voltage Applications
Eitake IBARAGI Akira HYOGO Keitaro SEKINE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/02/25
Vol. E83-A  No. 2 ; pp. 204-209
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog signal processingMOS analog circuittail current sourcehigh output impedancelow voltage operation
 Summary | Full Text:PDF(404.7KB)

A CMOS Analog Multiplier Free from Mobility Reduction and Body Effect
Eitake IBARAGI Akira HYOGO Keitaro SEKINE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/02/25
Vol. E82-A  No. 2 ; pp. 327-334
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog signal processingMOS analog circuitanalog multipliermobility reductionbody effect
 Summary | Full Text:PDF(425.5KB)

A Low Power Dissipation Technique for a Low Voltage OTA
Eitake IBARAGI Akira HYOGO Keitaro SEKINE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/02/25
Vol. E81-A  No. 2 ; pp. 237-243
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era)
Category: 
Keyword: 
analog signal processingMOS analog circuitMOS OTAlow voltage power supplylow power dissipation
 Summary | Full Text:PDF(579.2KB)

Design of a Sub-1. 5 V, 20 MHz, 0. 1% MOS Current-Mode Sample-and-Hold Circuit
Yasuhiro SUGIMOTO Masahiro SEKIYA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/02/25
Vol. E81-A  No. 2 ; pp. 258-260
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era)
Category: 
Keyword: 
low voltagehigh speedhigh accuracyMOS analog circuitsample-and-hold circuit
 Summary | Full Text:PDF(254.1KB)

A Study of the Signal-to-Noise Ratio of a High-Speed Current-Mode CMOS Sample-and-Hold Circuit
Yasuhiro SUGIMOTO Masahiro SEKIYA Tetsuya IIDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1986-1993
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
signal-to-noise rationoise analysissample-and-hold circuitcurrent-mode circuitMOS analog circuit
 Summary | Full Text:PDF(706.6KB)

1: n2 MOS Cascode Circuits and Their Applications
Koichi TANNO Okihiko ISHIZUKA Zheng TANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/12/25
Vol. E79-A  No. 12 ; pp. 2159-2165
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
MOS analog circuitMOS LSIcircuit theory and designintegrated circuitthreshold voltage
 Summary | Full Text:PDF(514.6KB)

Design of a Novel MOS VT Extractor Circuit
Koichi TANNO Okihiko ISHIZUKA Zhen TANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9 ; pp. 1306-1310
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
MOS analog circuitthreshold voltageMOS LSIcircuit theory and designintegrated circuit
 Summary | Full Text:PDF(313.6KB)

A Study of a MOS VCO Circuit by Using a Current–Controlled Differential Delay Cell
Yasuhiro SUGIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/11/25
Vol. E77-A  No. 11 ; pp. 1929-1931
Type of Manuscript:  Special Section LETTER (Special Section of Letters Selected from the 1994 IEICE Spring Conference)
Category: 
Keyword: 
MOS analog circuitPLLVCOcurrent controldifferential delay cell
 Summary | Full Text:PDF(136.5KB)