Keyword : IDDQ test

IDDQ Test Time Reduction by High Speed Charging of Load Capacitors of CMOS Logic Gates
Masaki HASHIZUME  Teppei TAKEDA  Masahiro ICHIMIYA  Hiroyuki YOTSUYANAGI  Yukiya MIURA  Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10  pp. 1534-1541
Type of Manuscript: Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Current Test
Keyword: 
IDDQ sensor,  CMOS,  IDDQ test,  bridging fault, 
  Summary |  Full Text:PDF (693.6KB)
Testable Static CMOS PLA for IDDQ Testing
Masaki HASHIZUME  Hiroshi HOSHIKA  Hiroyuki YOTSUYANAGI  Takeomi TAMESADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/06/01
Vol. E84-A  No. 6  pp. 1488-1495
Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000))
Category: 
Keyword: 
static PLA,  testable design,  IDDQ test,  bridging fault, 
  Summary |  Full Text:PDF (578KB)