Keyword : FD-SOI


A 28-nm 484-fJ/writecycle 650-fJ/readcycle 8T Three-Port FD-SOI SRAM for Image Processor
Haruki MORI Yohei UMEKI Shusuke YOSHIMOTO Shintaro IZUMI Koji NII Hiroshi KAWAGUCHI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C  No. 8 ; pp. 901-908
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
image memorymulti-port SRAM8TFD-SOI28-nmmajority logic
 Summary | Full Text:PDF(1.6MB)

A SOI Cache-Tag Memory with Dual-Rail Wordline Scheme
Nobutaro SHIBATA Takako ISHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/02/01
Vol. E99-C  No. 2 ; pp. 316-330
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
4-way set-associativecache-tagCMOSdirected graphdual-rail wordlineFD-SOII/O-separated memory cellLRUNRZ-type write-enable signalSIMOXSRAM
 Summary | Full Text:PDF(1.5MB)

A 0.15-µm FD-SOI Substrate Bias Control SRAM with Inter-Die Variability Compensation Scheme
Shunsuke OKUMURA Hidehiro FUJIWARA Kosuke YAMAGUCHI Shusuke YOSHIMOTO Masahiko YOSHIMOTO Hiroshi KAWAGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4 ; pp. 579-585
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
SRAMFD-SOIInter-die variation
 Summary | Full Text:PDF(1.8MB)

Adaptive Circuits for the 0.5-V Nanoscale CMOS Era
Kiyoo ITOH Masanao YAMAOKA Takashi OSHIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3 ; pp. 216-233
Type of Manuscript:  INVITED PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
minimum operating voltageSRAMDRAMFD-SOIFinFET
 Summary | Full Text:PDF(2.2MB)

Low-Voltage Embedded RAMs in Nanometer Era
Takayuki KAWAHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4 ; pp. 735-742
Type of Manuscript:  INVITED PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: 
Keyword: 
low-voltageSRAMDRAMFD-SOItwin-cellembedded RAM
 Summary | Full Text:PDF(1.1MB)

Accurate Small-Signal Modeling of FD-SOI MOSFETs
Guechol KIM Yoshiyuki SHIMIZU Bunsei MURAKAMI Masaru GOTO Keisuke UEDA Takao KIHARA Toshimasa MATSUOKA Kenji TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/04/01
Vol. E89-C  No. 4 ; pp. 517-519
Type of Manuscript:  Special Section LETTER (Special Section on Advanced RF Technologies for Compact Wireless Equipment and Mobile Phones)
Category: 
Keyword: 
FD-SOIMOSFETRFmodelingnon-quasi-static
 Summary | Full Text:PDF(237.8KB)

A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks
Jun TERADA Yasuyuki MATSUYA Shin'ichiro MUTOH Yuichi KADO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 479-483
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Analog
Keyword: 
A/D convertersample holdFD-SOIlow voltage
 Summary | Full Text:PDF(542.7KB)

Threshold Voltage Mismatch of FD-SOI MOSFETs
Yoshiyuki SHIMIZU Toshimasa MATSUOKA Kenji TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6 ; pp. 1013-1014
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
threshold voltageFD-SOIfloating body effectDIBL
 Summary | Full Text:PDF(134.4KB)