Keyword : DRAM refresh


Evaluating DRAM Refresh Architectures for Merged DRAM/Logic LSIs
Taku OHSAWA Koji KAI Kazuaki MURAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9 ; pp. 1455-1462
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
DRAMDRAM refreshmerged DRAM/logicsystem LSIlow power
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