IEICE SEARCH SYSTEM

Keyword : CMOS inverter

CMOS Circuits Based on a Stacked Structure Using Silicone-Resin as Dielectric Layers Kodai KIKUCHI Fanghua PU Hiroshi YAMAUCHI Masaaki IIZUKA Masakazu NAKAMURA Kazuhiro KUDO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/02/01 Vol. E94-C No. 2 pp. 136-140 Type of Manuscript: Special Section PAPER (Special Section on Recent Progress in Molecular and Organic Devices) Category: Keyword: organic transistor, silicone-resin, polymer gate dielectric, CMOS inverter, stacked structure,
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Wide Range CMOS Voltage Detector with Low Current Consumption and Low Temperature Variation Kawori TAKAKUBO Hajime TAKAKUBO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/02/01 Vol. E92-A No. 2 pp. 443-450 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: voltage detector, CMOS inverter, power line operation, wide range, low current consumption, low temperature variation,
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Characterization of Zinc Oxide and Pentacene Thin Film Transistors for CMOS Inverters Hiroyuki IECHI Yasuyuki WATANABE Hiroshi YAMAUCHI Kazuhiro KUDO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/12/01 Vol. E91-C No. 12 pp. 1843-1847 Type of Manuscript: Special Section PAPER (Special Section on The Forefront of 21st Century Organic Molecular Electronics) Category: Transistors Keyword: pentacene, zinc oxide, sputter, field effect transistor, interface, CMOS inverter, organic logic circuit,
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Highly Efficient Comparator Design Automation for TIQ Flash A/D Converter Insoo KIM Jincheol YOO JongSoo KIM Kyusun CHOI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/12/01 Vol. E91-A No. 12 pp. 3415-3422 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Level Design Keyword: flash A/D converter, CMOS inverter, comparator, threshold inverter quantization (TIQ), analog design automation,
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Design of a 0.5 V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources Jun WANG Tuck-Yang LEE Dong-Gyou KIM Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/08/01 Vol. E91-C No. 8 pp. 1375-1378 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: operational amplifier, CMOS inverter, floating voltage source, forward body bias,
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A Very Wideband Active RC Polyphase Filter with Minimum Element Value Spread Using Fully Balanced OTA Based on CMOS Inverters Keishi KOMORIYAMA Makoto YASHIKI Eiichi YOSHIDA Hiroshi TANIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/06/01 Vol. E91-C No. 6 pp. 879-886 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: active RC polyphase filter, fully differential OTA, CMOS inverter, wideband, element value spread,
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Modeling the Influence of Input-to-Output Coupling Capacitance on CMOS Inverter Delay Zhangcai HUANG Atsushi KUROKAWA Yun YANG Hong YU Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/04/01 Vol. E89-A No. 4 pp. 840-846 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: CMOS inverter, overshooting effect, deep submicron, timing analysis,
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Modeling the Effective Capacitance of Interconnect Loads for Predicting CMOS Gate Slew Zhangcai HUANG Atsushi KUROKAWA Jun PAN Yasuaki INOUE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3367-3374 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Prediction and Analysis Keyword: static timing analysis, gate slew, CMOS inverter, effective capacitance, interconnect loads,
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A Novel Model for Computing the Effective Capacitance of CMOS Gates with Interconnect Loads Zhangcai HUANG Atsushi KUROKAWA Yasuaki INOUE Junfa MAO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/10/01 Vol. E88-A No. 10 pp. 2562-2569 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: static timing analysis, gate delay, CMOS inverter, effective capacitance, interconnect loads,
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Far-End Crosstalk Voltage for a CMOS-IC Inverter Load Yasuaki NOGUCHI Nobuyuki MIYAO Fujihiko MATSUMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/06/01 Vol. E86-A No. 6 pp. 1451-1457 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2002 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2002)) Category: Keyword: far-end crosstalk, CMOS inverter, microstrip lines, nonlinear impedance, clamp diode,
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