IEICE TRANSACTIONS on Electronics

Archive Index

Online ISSN : 1745-1353
Volume E99-C No.4  (Publication Date:2016/04/01)
[Whole issue]:PDF (14.7MB)
Previous | 
Next
Special Section on Solid-State Circuit Design---Architecture, Circuit, Device and Design Methodology

pp.430-430  FOREWORD  Open Access Paper
FOREWORD
Minoru FUJISHIMA  
Summary | FreeFull Text:PDF(75.2KB)

pp.431-439  PAPER
A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices
Jungnam BAE  Saichandrateja RADHAPURAM  Ikkyun JO  Weimin WANG  Takao KIHARA  Toshimasa MATSUOKA  
Summary | Full Text:PDF (1.7MB) >>Buy this Article

pp.440-443  BRIEF PAPER
An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis
Pil-Ho LEE  Yu-Jeong HWANG  Han-Yeol LEE  Hyun-Bae LEE  Young-Chan JANG  
Summary | Full Text:PDF (937.6KB) >>Buy this Article

pp.444-451  PAPER
Variation of SCM/NAND Flash Hybrid SSD Performance, Reliability and Cost by Using Different SSD Configurations and Error Correction Strengths
Hirofumi TAKISHITA  Shuhei TANAKAMARU  Sheyang NING  Ken TAKEUCHI  
Summary | Full Text:PDF (2.1MB) >>Buy this Article

pp.452-457  PAPER
A Noise-Robust Positive-Feedback Floating-Gate Logic
Luis F. CISNEROS-SINENCIO  Alejandro DIAZ-SANCHEZ  Jaime RAMIREZ-ANGULO  
Summary | Full Text:PDF (1.1MB) >>Buy this Article

Regular Section

pp.458-465  PAPER-Electronic Circuits
A 12.5Gbps CDR with Differential to Common Converting Edge Detector for the Wired and Wireless Serial Link
Kaoru KOHIRA  Hiroki ISHIKURO  
Summary | Full Text:PDF (1.9MB) >>Buy this Article

pp.466-473  PAPER-Semiconductor Materials and Devices
Study on Threshold Voltage Variation Evaluated by Charge-Based Capacitance Measurement
Katsuhiro TSUJI  Kazuo TERADA  Ryo TAKEDA  Hisato FUJISAKA  
Summary | Full Text:PDF (2.1MB) >>Buy this Article

pp.474-480  PAPER-Semiconductor Materials and Devices
Low-Temperature Activation in Boron Ion-Implanted Silicon by Soft X-Ray Irradiation
Akira HEYA  Naoto MATSUO  Kazuhiro KANDA  
Summary | Full Text:PDF (805.2KB) >>Buy this Article

pp.481-490  PAPER-Integrated Electronics
A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques
Chia-Wen CHANG  Kai-Yu LO  Hossameldin A. IBRAHIM  Ming-Chiuan SU  Yuan-Hua CHU  Shyh-Jye JOU  
Summary | Full Text:PDF (2.2MB) >>Buy this Article

pp.491-502  PAPER-Electronic Instrumentation and Control
Parallel Design of Feedback Control Systems Utilizing Dead Time for Embedded Multicore Processors
Yuta SUZUKI  Kota SATA  Jun'ichi KAKO  Kohei YAMAGUCHI  Fumio ARAKAWA  Masato EDAHIRO  
Summary | Full Text:PDF (1.8MB) >>Buy this Article

Previous | 
Next
go to Page Top