IEICE TRANSACTIONS on Electronics

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Volume E79-C No.2  (Publication Date:1996/02/25)
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Special Issue on Microelectronic Test Structures

pp.143-144  FOREWORD
FOREWORD
Yoichi TAMAKI  
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pp.145-151  PAPER-Device and Circuit Characterization
A Novel Threshold Voltage Distribution Measuring Technique for Flash EEPROM Devices
Toshihiko HIMENO  Naohiro MATSUKAWA  Hiroaki HAZAMA  Koji SAKUI  Masamitsu OSHIKIRI  Kazunori MASUDA  Kazushige KANDA  Yasuo ITOH  Jin-ichi  MIYAMOTO  
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pp.152-157  PAPER-Device and Circuit Characterization
Effects of Field Edge Steps on Electrical Gate Linewidth Measurements
Naoki KASAI  Ichiro YAMAMOTO  Koji URABE  Kuniaki KOYAMA  
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pp.158-164  PAPER-Device and Circuit Characterization
Test Structures and a Modified Transmission Line Pulse System for the Study of Electrostatic Discharge
Robert A. ASHTON  
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pp.165-171  PAPER-Device and Circuit Characterization
Simplified Distribution Base Resistance Model in Self-Aligned Bipolar Transistors
Masamichi TANABE  Hiromi SHIMAMOTO  Takahiro ONAI  Katsuyoshi WASHIO  
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pp.172-178  PAPER-Device and Circuit Characterization
Electrical Characteristics of n- and p-MOSFETs with Gates Crossing Source/Drain Regions at 90and 45
Takashi OHZONE  Naoko MATSUYAMA  
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pp.179-184  PAPER-Device and Circuit Characterization
Evaluation of Soft-Error Immunity for 1-V CMOS Memory Cells with MTCMOS Technology
Takakuni DOUSEKI  Shin'ichiro MUTOH  Takemi UEKI  Junzo YAMADA  
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pp.185-191  PAPER-SOI & Material Characterization
Modeling of Leak Current Characteristics in High Frequency Operation of CMOS Circuits Fabricated on SOI Substrate
Hiroshi ITO  Kunihiro ASADA  
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pp.192-197  PAPER-SOI & Material Characterization
Test Structure for the Evaluation of Si Substrates
Yoshiko YOSHIDA  Mikihiro KIMURA  Morihiko KUME  Hidekazu YAMAMOTO  Hiroshi KOYAMA  
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pp.198-205  PAPER-Reliability Analysis
Quantitative Charge Build-Up Evaluation Technique by Using MOS Capacitors with Charge Collecting Electrodes in Wafer Processing
Hiroki KUBO  Takashi NAMURA  Kenji YONEDA  Hiroshi OHISHI  Yoshihiro TODOKORO  
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pp.206-210  PAPER-Reliability Analysis
Reliability Evaluation of Thin Gate Oxide Using a Flat Capacitor Test Structure
Masafumi KATSUMATA  Jun-ichi MITSUHASHI  Kiyoteru KOBAYASHI  Yoji MASHIKO  Hiroshi KOYAMA  
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pp.211-218  PAPER-Reliability Analysis
Test Structure and Experimental Analysis of Emitter-Base Reverse Voltage Stress Degradation in Self-Aligned Bipolar Transistors
Hiromi SHIMAMOTO  Masamichi TANABE  Takahiro ONAI  Katsuyoshi WASHIO  Tohru NAKAMURA  
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pp.219-225  PAPER-Statistical Analysis
The Application of DOE and RSM Techniques for Wafer Mapping in IC Technology
Anthony J. WALTON  Martin FALLON  David WILSON  
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pp.226-233  PAPER-Statistical Analysis
A New Hierarchical RSM for TCAD-Based Device Design in 0.4µm CMOS Development
Hisako SATO  Katsumi TSUNENO  Kimiko AOYAMA  Takahide NAKAMURA  Hisaaki KUNITOMO  Hiroo MASUDA  
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Regular Section

pp.234-242  PAPER-Integrated Electronics
Half-Vcc Plate Nonvolatile DRAMs with Ferroelectric Capacitors
Kan TAKEUCHI  Katsumi MATSUNO  Yoshinobu NAKAGOME  Masakazu AOKI  
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pp.243-248  PAPER-Electromagnetic Theory
Coupling Coefficients and Coupled Power Equations Describing the Crosstalk in an Image Fiber
Akira KOMIYAMA  
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pp.249-251  LETTER-Electromagnetic Theory
Near Fields Radiated from a Long Slot on a Circular Conducting Cylinder
Masao KODAMA  Kengo TAIRA  
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