IEICE TRANSACTIONS on Electronics

Latest Issue

Online ISSN : 1745-1353
Volume E99-C No.8  (Publication Date:2016/08/01)
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Special Section on Low-Power and High-Speed Chips

pp.899-900  FOREWORD  Open Access Paper
FOREWORD
Fumio ARAKAWA  Makoto IKEDA  
Summary | FreeFull Text:PDF(132.7KB)

pp.901-908  PAPER
A 28-nm 484-fJ/writecycle 650-fJ/readcycle 8T Three-Port FD-SOI SRAM for Image Processor
Haruki MORI  Yohei UMEKI  Shusuke YOSHIMOTO  Shintaro IZUMI  Koji NII  Hiroshi KAWAGUCHI  Masahiko YOSHIMOTO  
Summary | Full Text:PDF (1.7MB) >>Buy this Article

pp.909-917  PAPER
Multi-Voltage Variable Pipeline Routers with the Same Clock Frequency for Low-Power Network-on-Chips Systems
Akram BEN AHMED  Hiroki MATSUTANI  Michihiro KOIBUCHI  Kimiyoshi USAMI  Hideharu AMANO  
Summary | Full Text:PDF (798.2KB) >>Buy this Article

pp.918-925  PAPER
A Slack Reclamation Method for Reducing the Speed Fluctuations on the DVFS Real-Time Scheduling
Da-Ren CHEN  Chiun-Chieh HSU  Hon-Chan CHEN  
Summary | Full Text:PDF (1MB) >>Buy this Article

pp.926-935  PAPER
An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications
Atsushi KOSHIBA  Mikiko SATO  Kimiyoshi USAMI  Hideharu AMANO  Ryuichi SAKAMOTO  Masaaki KONDO  Hiroshi NAKAMURA  Mitaro NAMIKI  
Summary | Full Text:PDF (2.7MB) >>Buy this Article

pp.936-946  PAPER
Improvement of Data Utilization Efficiency for Cache Memory by Compressing Frequent Bit Sequences
Ryotaro KOBAYASHI  Ikumi KANEKO  Hajime SHIMADA  
Summary | Full Text:PDF (800.7KB) >>Buy this Article

Regular Section

pp.947-955  PAPER-Electromagnetic Theory
New Estimation Method for the Operational Low Frequency End of Antipodal Vivaldi Antennas
Hien Ba CHU  Hiroshi SHIRAI  Chien Dao NGOC  
Summary | Full Text:PDF (2.1MB) >>Buy this Article

pp.956-962  PAPER-Electronic Circuits
A Short-Time Three-Phase Single-Rail Precharge Logic against Differential Power Analysis
Wenyi TANG  Song JIA  Yuan WANG  
Summary | Full Text:PDF (4.3MB) >>Buy this Article

pp.963-973  PAPER-Electronic Circuits
A 9.35-ENOB, 14.8 fJ/conv.-step Fully-Passive Noise-Shaping SAR ADC
Zhijie CHEN  Masaya MIYAHARA  Akira MATSUZAWA  
Summary | Full Text:PDF (2.7MB) >>Buy this Article

pp.974-983  PAPER-Electronic Circuits
Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology
Tian WANG  Xiaoxin CUI  Kai LIAO  Nan LIAO  Xiaole CUI  Dunshan YU  
Summary | Full Text:PDF (4MB) >>Buy this Article

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