IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences

Archive Index

Online ISSN : 1745-1337
Volume E96-A No.12  (Publication Date:2013/12/01)
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Special Section on Information Theory and Its Applications

pp.2323-2323  FOREWORD
FOREWORD
Tadashi WADAYAMA  
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pp.2324-2331  PAPER-Shannon Theory
Random-Coding Exponential Error Bounds for Channels with Action-Dependent States
Tetsunao MATSUTA  Tomohiko UYEMATSU  
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pp.2332-2342  PAPER-Source Coding
Redundancy-Optimal FF Codes for a General Source and Its Relationships to the Rate-Optimal FF Codes
Mitsuharu ARIMURA  Hiroki KOGA  Ken-ichi IWATA  
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pp.2343-2350  PAPER-Source Coding
Real-Time and Memory-Efficient Arrhythmia Detection in ECG Monitors Using Antidictionary Coding
Takahiro OTA  Hiroyoshi MORITA  Adriaan J. de Lind van WIJNGAARDEN  
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pp.2351-2359  PAPER-Data Compression
Periodic Pattern Coding for Last Level Cache Data Compression
Haruhiko KANEKO  
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pp.2360-2367  PAPER-Coding Theory
Flash Code Utilizing Binary-Indexed Slice Encoding and Resizable-Clusters
Michael Joseph TAN  Yuichi KAJI  
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pp.2368-2373  PAPER-Coding Theory
Recursive Construction of (k+1)-Ary Error-Correcting Signature Code for Multiple-Access Adder Channel
Shan LU  Jun CHENG  Yoichiro WATANABE  
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pp.2374-2381  PAPER-Coding Theory
Construction of High Rate Punctured Convolutional Codes by Exhaustive Search and Partial Search
Sen MORIYA  Hiroshi SASANO  
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pp.2382-2390  PAPER-Coding Theory
Weight Distribution for Non-binary Cluster LDPC Code Ensemble
Takayuki NOZAKI  Masaki MAEHARA  Kenta KASAI  Kohichi SAKANIWA  
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pp.2391-2397  PAPER-Image Processing
Complex Approximate Message Passing Algorithm for Two-Dimensional Compressed Sensing
Akira HIRABAYASHI  Jumpei SUGIMOTO  Kazushi MIMURA  
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pp.2398-2404  PAPER-Signal Processing
A Rectangular Weighting Function Approximating Local Phase Error for Designing Equiripple All-Pass IIR Filters
Taisaku ISHIWATA  Yoshinao SHIRAKI  
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pp.2405-2414  PAPER-Communication Theory
An Improved Quantization Scheme for Lattice-Reduction Aided MIMO Detection Based on Gram-Schmidt Orthogonalization
Wei HOU  Tadashi FUJINO  Toshiharu KOJIMA  
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pp.2415-2421  PAPER-Sequence
On the Irreducibility of Certain Shifts of Finite Type
Tetsuya KOBAYASHI  Akiko MANADA  Takahiro OTA  Hiroyoshi MORITA  
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pp.2422-2433  PAPER-Information Security
Efficient Proofs for CNF Formulas on Attributes in Pairing-Based Anonymous Credential System
Nasima BEGUM  Toru NAKANISHI  Nobuo FUNABIKI  
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pp.2434-2442  PAPER-Information Security
Multilane Hashing Mode Suitable for Parallel Processing
Hidenori KUWAKADO  Shoichi HIROSE  
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pp.2443-2446  LETTER-Source Coding
A Characterization of Optimal FF Coding Rate Using a New Optimistically Optimal Code
Mitsuharu ARIMURA  Hiroki KOGA  Ken-ichi IWATA  
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pp.2447-2451  LETTER-Coding Theory
On the Dependence of Error Performance of Spatially Coupled LDPC Codes on Their Design Parameters
Hiroyuki IHARA  Tomoharu SHIBUYA  
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pp.2452-2456  LETTER-Sequence
Fourier Analysis of Sequences over a Composition Algebra of the Real Number Field
Takao MAEDA  Takafumi HAYASHI  
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Special Section on VLSI Design and CAD Algorithms

pp.2457-2457  FOREWORD
FOREWORD
Kimiyoshi USAMI  
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pp.2458-2466  PAPER-Physical Level Design
High-Throughput Electron Beam Direct Writing of VIA Layers by Character Projection with One-Dimensional VIA Characters
Rimon IKENO  Takashi MARUYAMA  Satoshi KOMATSU  Tetsuya IIZUKA  Makoto IKEDA  Kunihiro ASADA  
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pp.2467-2474  PAPER-Physical Level Design
Interconnect-Driven Floorplanning with Noise-Aware Buffer Planning
Katherine Shu-Min LI  Yingchieh HO  Liang-Bi CHEN  
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pp.2475-2486  PAPER-Physical Level Design
Structured Analog Circuit and Layout Design with Transistor Array
Bo YANG  Qing DONG  Jing LI  Shigetoshi NAKATAKE  
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pp.2487-2498  PAPER-Physical Level Design
Analog Circuit Synthesis with Constraint Generation of Layout-Dependent Effects by Geometric Programming
Yu ZHANG  Gong CHEN  Bo YANG  Jing LI  Qing DONG  Ming-Yu LI  Shigetoshi NAKATAKE  
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pp.2499-2507  PAPER-Physical Level Design
Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation
Shinichi NISHIZAWA  Tohru ISHIHARA  Hidetoshi ONODERA  
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pp.2508-2515  PAPER-Circuit Design
A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier
Hyunui LEE  Masaya MIYAHARA  Akira MATSUZAWA  
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pp.2516-2523  PAPER-Device and Circuit Modeling and Analysis
Performance Evaluation of Probing Front-End Circuits for On-Chip Noise Monitoring
Yuuki ARAGA  Nao UEDA  Yasumasa TAKAGI  Makoto NAGATA  
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pp.2524-2532  PAPER-Device and Circuit Modeling and Analysis
Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points
Zhou JIN  Xiao WU  Dan NIU  Yasuaki INOUE  
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pp.2533-2541  PAPER-Device and Circuit Modeling and Analysis
A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation
Daisuke FUJIMOTO  Toshihiro KATASHITA  Akihiko SASAKI  Yohei HORI  Akashi SATOH  Makoto NAGATA  
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pp.2542-2552  PAPER-Device and Circuit Modeling and Analysis
A New Delay Distribution Model with a Half Triangular Distribution for Statistical Static Timing Analysis
Shuji TSUKIYAMA  Masahiro FUKUI  
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pp.2553-2560  PAPER-Logic Synthesis, Test and Verification
An Exact Approach for GPC-Based Compressor Tree Synthesis
Taeko MATSUNAGA  Shinji KIMURA  Yusuke MATSUNAGA  
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pp.2561-2567  PAPER-Logic Synthesis, Test and Verification
SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines
Jun YAMASHITA  Hiroyuki YOTSUYANAGI  Masaki HASHIZUME  Kozo KINOSHITA  
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pp.2568-2575  PAPER-Logic Synthesis, Test and Verification
Dual-Stage Pseudo Power Gating with Advanced Clustering Algorithm for Gate Level Power Optimization
Yu JIN  Zhe DU  Shinji KIMURA  
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pp.2576-2586  PAPER-High-Level Synthesis and System-Level Design
Evaluation of an FPGA-Based Heterogeneous Multicore Platform with SIMD/MIMD Custom Accelerators
Yasuhiro TAKEI  Hasitha Muthumala WAIDYASOORIYA  Masanori HARIYAMA  Michitaka KAMEYAMA  
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pp.2587-2596  PAPER-High-Level Synthesis and System-Level Design
A New 8-Bit AES Design for Wireless Network Applications
Ming-Chih CHEN  
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pp.2597-2611  PAPER-High-Level Synthesis and System-Level Design
Floorplan Driven Architecture and High-Level Synthesis Algorithm for Dynamic Multiple Supply Voltages
Shin-ya ABE  Youhua SHI  Kimiyoshi USAMI  Masao YANAGISAWA  Nozomu TOGAWA  
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pp.2612-2622  PAPER-High-Level Synthesis and System-Level Design
A High Performance HEVC De-Blocking Filter and SAO Architecture for UHDTV Decoder
Jiayi ZHU  Dajiang ZHOU  Satoshi GOTO  
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pp.2623-2632  PAPER-High-Level Synthesis and System-Level Design
A 5.83pJ/bit/iteration High-Parallel Performance-Aware LDPC Decoder IP Core Design for WiMAX in 65nm CMOS
Xiongxin ZHAO  Zhixiang CHEN  Xiao PENG  Dajiang ZHOU  Satoshi GOTO  
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pp.2633-2644  PAPER-High-Level Synthesis and System-Level Design
An Inductive-Coupling Interconnected Application-Specific 3D NoC Design
Zhen ZHANG  Shouyi YIN  Leibo LIU  Shaojun WEI  
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pp.2645-2651  PAPER-High-Level Synthesis and System-Level Design
High Performance NAND Flash Memory System with a Data Buffer
Jung-Hoon LEE  Bo-Sung JUNG  
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pp.2652-2659  PAPER-High-Level Synthesis and System-Level Design
Hybrid Message-Passing Algorithm and Architecture for Decoding Cyclic Non-binary LDPC Codes
Yichao LU  Gang HE  Guifen TIAN  Satoshi GOTO  
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pp.2660-2667  PAPER-High-Level Synthesis and System-Level Design
DC-DC Converter-Aware Task Scheduling and Dynamic Reconfiguration for Energy Harvesting Embedded Systems
Kyungsoo LEE  Tohru ISHIHARA  
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pp.2668-2679  PAPER-High-Level Synthesis and System-Level Design
Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips
Trung Anh DINH  Shigeru YAMASHITA  Tsung-Yi HO  Yuko HARA-AZUMI  
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pp.2680-2688  PAPER-High-Level Synthesis and System-Level Design
Hardware Efficient and Low Latency Implementations of Look-Ahead ACS Computation for Viterbi Decoders
Kazuhito ITO  Ryoto SHIRASAKA  
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Regular Section

pp.2689-2697  PAPER-VLSI Design Technology and CAD
Dual-Edge-Triggered Flip-Flop-Based High-Level Synthesis with Programmable Duty Cycle
Keisuke INOUE  Mineo KANEKO  
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pp.2698-2708  PAPER-Numerical Analysis and Optimization
New Formulation for the Recursive Transfer Method Using the Weak Form Theory Framework and Its Application to Microwave Scattering
Hatsuhiro KATO  Hatsuyoshi KATO  
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pp.2709-2716  PAPER-Cryptography and Information Security
Identity-Based Public Verification with Privacy-Preserving for Data Storage Security in Cloud Computing
Jining ZHAO  Chunxiang XU  Fagen LI  Wenzheng ZHANG  
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pp.2717-2727  PAPER-Vision
Retrieval and Localization of Multiple Specific Objects with Hough Voting Based Ranking and A Contrario Decision
Pradit MITTRAPIYANURUK  Pakorn KAEWTRAKULPONG  
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pp.2728-2730  LETTER-Digital Signal Processing
On the Sparse Signal Recovery with Parallel Orthogonal Matching Pursuit
Shin-Woong PARK  Jeonghong PARK  Bang Chul JUNG  
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pp.2731-2734  LETTER-Cryptography and Information Security
Improving the Adaptive Steganographic Methods Based on Modulus Function
Xin LIAO  Qiaoyan WEN  Jie ZHANG  
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pp.2735-2739  LETTER-Communication Theory and Signals
Novel Relay Protocol Using AMC Based Throughput Optimization in LTE-Advanced System
Saransh MALIK  Sangmi MOON  Bora KIM  Huaping LIU  Cheolwoo YOU  Jeong-Ho KIM  Intae HWANG  
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pp.2740-2744  LETTER-Communication Theory and Signals
An Interference-Aware Clustering Based on Genetic Algorithm for Cell Broadcasting Service
Kyungho JUN  Sekchin CHANG  
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pp.2745-2749  LETTER-Intelligent Transport System
Magnetic Disturbance Detection Method for Ubiquitous Device
Kensuke SAWADA  Shigenobu SASAKI  Shinichiro MORI  
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