IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences

Archive Index

Online ISSN : 1745-1337
Volume E92-A No.6  (Publication Date:2009/06/01)
Previous | 
Next
RSS Feed(Latest Issue) >>  Learn more
Regular Section

pp.1399-1407  PAPER-Engineering Acoustics
Directional Sound Radiation System Using a Large Planar Diaphragm Incorporating Multiple Vibrators
Yoko YAMAKATA  Michiaki KATSUMOTO  Toshiyuki KIMURA 
Summary |  Full Text:PDF (1.3MB)

pp.1408-1416  PAPER-Ultrasonics
A Scalable Tracking System Using Ultrasonic Communication
Toshio ITO  Tetsuya SATO  Kan TULATHIMUTTE  Masanori SUGIMOTO  Hiromichi HASHIZUME 
Summary |  Full Text:PDF (555.5KB)

pp.1417-1423  PAPER-Digital Signal Processing
An Iterative Fusion Technique for Dynamic Side Information Refinement in Pixel Domain Distributed Video Coding
Buddika ADIKARI  Anil FERNANDO  Rajitha WEERAKKODY  Ahmet M. KONDOZ 
Summary |  Full Text:PDF (317.2KB)

pp.1424-1432  PAPER-Digital Signal Processing
A Low Power Reconfigurable Channel Filter Using Multi-Band and Masking Architecture for Channel Adaptation in Cognitive Radio
K. G. SMITHA  A. P. VINOD 
Summary |  Full Text:PDF (284.8KB)

pp.1433-1441  PAPER-VLSI Design Technology and CAD
Routability Driven Via Assignment Method for 2-Layer Ball Grid Array Packages
Yoichi TOMIOKA  Atsushi TAKAHASHI 
Summary |  Full Text:PDF (549.9KB)

pp.1442-1453  PAPER-VLSI Design Technology and CAD
An L1 Cache Design Space Exploration System for Embedded Applications
Nobuaki TOJO  Nozomu TOGAWA  Masao YANAGISAWA  Tatsuo OHTSUKI 
Summary |  Full Text:PDF (1.1MB)

pp.1454-1463  PAPER-VLSI Design Technology and CAD
Finite Input-Memory Automaton Based Checker Synthesis of SystemVerilog Assertions for FPGA Prototyping
Chengjie ZANG  Shinji KIMURA 
Summary |  Full Text:PDF (260.5KB)

pp.1464-1475  PAPER-VLSI Design Technology and CAD
Interconnect-Aware Pipeline Synthesis for Array-Based Architectures
Shanghua GAO  Hiroaki YOSHIDA  Kenshu SETO  Satoshi KOMATSU  Masahiro FUJITA 
Summary |  Full Text:PDF (1MB)

pp.1476-1484  PAPER-VLSI Design Technology and CAD
Efficient Partial Reluctance Extraction for Large-Scale Regular Power Grid Structures
Shan ZENG  Wenjian YU  Jin SHI  Xianlong HONG  Chung-Kuan CHENG 
Summary |  Full Text:PDF (672.4KB)

pp.1485-1493  PAPER-Reliability, Maintainability and Safety Analysis
Bayesian Optimal Release Time Based on Inflection S-Shaped Software Reliability Growth Model
Hee Soo KIM  Dong Ho PARK  Shigeru YAMADA 
Summary |  Full Text:PDF (1.1MB)

pp.1494-1499  PAPER-Cryptography and Information Security
Practical Hierarchical Identity Based Encryption Scheme without Random Oracles
Xiaoming HU  Shangteng HUANG  Xun FAN 
Summary |  Full Text:PDF (112KB)

pp.1500-1507  PAPER-Information Theory
Finding a Basis Conversion Matrix via Prime Gauss Period Normal Basis
Yasuyuki NOGAMI  Ryo NAMBA  Yoshitaka MORIKAWA 
Summary |  Full Text:PDF (298.8KB)

pp.1508-1519  PAPER-Coding Theory
A Class of Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols
Haruhiko KANEKO  Eiji FUJIWARA 
Summary |  Full Text:PDF (1.3MB)

pp.1520-1522  LETTER-Digital Signal Processing
Pilot-Less Sampling Frequency Synchronization Scheme for UWB-OFDM
Young-Hwan YOU  Kwang-Soo JEONG  Jae-Hoon YI 
Summary |  Full Text:PDF (131.6KB)

pp.1523-1525  LETTER-Digital Signal Processing
A Robust Sampling Frequency Offset Estimator for WLAN-OFDM
Young-Hwan YOU  Taewon HWANG  Kwang-Soo JEONG  Jae-Hoon YI 
Summary |  Full Text:PDF (120.3KB)

pp.1526-1529  LETTER-Digital Signal Processing
Tracking Analysis of Complex Adaptive IIR Notch Filter for a Linear Chirp Signal
Aloys MVUMA  Shotaro NISHIMURA  Takao HINAMOTO 
Summary |  Full Text:PDF (170.9KB)

pp.1530-1534  LETTER-Systems and Control
Robust Reduced Order Observer for Lipschitz Nonlinear Systems
Sungryul LEE 
Summary |  Full Text:PDF (175.1KB)

pp.1535-1537  LETTER-Systems and Control
On Robust Approximate Feedback Linearization: A Nonlinear Control Approach
Ho-Lim CHOI  Jong-Tae LIM 
Summary |  Full Text:PDF (91.7KB)

pp.1538-1540  LETTER-VLSI Design Technology and CAD
Design of Low Power QPP Interleave Address Generator Using the Periodicity of QPP
Won-Ho LEE  Chong Suck RIM 
Summary |  Full Text:PDF (159.9KB)

pp.1541-1543  LETTER-Cryptography and Information Security
Invisibly Sanitizable Signature without Pairings
Dae Hyun YUM  Pil Joong LEE 
Summary |  Full Text:PDF (75.1KB)

pp.1544-1547  LETTER-Cryptography and Information Security
Modeling Security Bridge Certificate Authority Architecture
Yizhi REN  Mingchu LI  Kouichi SAKURAI 
Summary |  Full Text:PDF (407.3KB)

pp.1548-1553  LETTER-Computer Graphics
An Automatic Generative Method for Stylus Style CG
Hiroki IMAMURA  Asami HISAMATSU  Makoto FUJIMURA  Hideo KURODA 
Summary |  Full Text:PDF (1.2MB)

Previous | 
Next
go to Page Top