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| IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Archive Index |
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| Online ISSN : 1745-1337
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| Volume E91-A No.10 (Publication Date:2008/10/01)
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Special Section on Information Theory and Its Applications |
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pp.2696-2703 SURVEY PAPER-Communication Theory Towards Efficient Detection of Two-Dimensional Intersymbol Interference Channels Brian M. KURKOSKI
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pp.2704-2719 PAPER-Information Theory Large Deviation Theorems Revisited: Information-Spectrum Approach Te-Sun HAN
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pp.2827-2832 PAPER-Communication Theory Fair End-to-End Session Rates in Multihop Wireless Networks Won-Joo HWANG
Cong-Loi LE
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pp.2833-2842 PAPER-Cryptography and Information Security Generalized Scalar Multiplication Secure against SPA, DPA, and RPA Atsuko MIYAJI
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pp.2851-2859 PAPER-Cryptography and Information Security Compression Functions Suitable for the Multi-Property-Preserving Transform Hidenori KUWAKADO
Masakatu MORII
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pp.2860-2867 PAPER-Cryptography and Information Security Efficient Secret Sharing Schemes Based on Unauthorized Subsets Kouya TOCHIKUBO
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pp.2868-2869 LETTER-Information Theory On the Suboptimality of Linear Lossy Codes Shigeaki KUZUOKA
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pp.2870-2873 LETTER-Information Theory Key Rate Available from Mismatched Measurements in the BB84 Protocol and the Uncertainty Principle Ryutaroh MATSUMOTO
Shun WATANABE
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pp.2874-2876 LETTER-Coding Theory Multiple Scaling Extrinsic Soft Information for Improved Min-Sum Iterative Decoding of LDPC Codes Cheon Ho LEE
Young Chai KO
Jun HEO
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pp.2877-2880 LETTER-Coding Theory Theoretical Analysis of Bit Error Probability for 4-State Convolutional Code with Max-Log MAP Decoding Hideki YOSHIKAWA
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pp.2881-2884 LETTER-Spectrum Technologies Properties of a Convoluted-Time and Code Division Multiple Access Communication Systems Based upon Complete Complementary Codes Tetsuya KOJIMA
Masahiro AONO
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Special Section on Smart Multimedia & Communication Systems |
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pp.2980-2989 PAPER-Chaotic Communication A Novel Chaotic Multiple-Bits Modulation Scheme Using Mapping Parameters as Data Carrier Kenji YANO
Kiyoshi TANAKA
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Regular Section |
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pp.3030-3037 PAPER-VLSI Design Technology and CAD A Fast Gate-Level Register Relocation Method for Circuit Size Reduction in General-Synchronous Framework Yukihide KOHIRA
Atsushi TAKAHASHI
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pp.3076-3079 LETTER-Systems and Control Schedulability Analysis of Periodic and Sporadic Tasks Using a Timed Discrete Event Model with Memorable Events Jung-Min YANG
Seong-Jin PARK
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pp.3080-3083 LETTER-Circuit Theory Electronically Tunable High Input Impedance Voltage-Mode Multifunction Filter Hua-Pin CHEN
Wan-Shing YANG
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