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IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences

Archive Index

Volume E88-A No.4 (Publication Date:2005/04/01)

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Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa

pp.809-809 FOREWORD FOREWORD Mitsuji MUNEYASU
	Summary \| Full Text:PDF (36.4KB)

pp.810-817 PAPER Rigorous Verification of Poincare Map Generated by a Continuous Piece-Wise Linear Vector Field and Its Application Hideaki OKAZAKI Katsuhide FUJITA Hirohiko HONDA Hideo NAKANO
	Summary \| Full Text:PDF (694.9KB)

pp.818-824 PAPER Optimal Design of Sensor Parameters in PLC-Based Control System Using Mixed Integer Programming Eiji KONAKA Takashi MUTOU Tatsuya SUZUKI Shigeru OKUMA
	Summary \| Full Text:PDF (424.1KB)

pp.825-831 PAPER Path Following Circuits--SPICE-Oriented Numerical Methods Where Formulas are Described by Circuits-- Kiyotaka YAMAMURA Wataru KUROKI Hideaki OKUMA Yasuaki INOUE
	Summary \| Full Text:PDF (312.9KB)

pp.832-837 PAPER Rail-to-Rail OTA Utilizing Linear V-I Conversion Circuit Whose Input Stage is Composed of Single Channel MOSFETs Nobukazu TAKAI Keigo KAWAI
	Summary \| Full Text:PDF (315.3KB)

pp.838-845 PAPER Unified Phase Compiler by Use of 3-D Representation Space Takefumi MIYOSHI Nobuhiko SUGINO
	Summary \| Full Text:PDF (498.1KB)

pp.846-854 PAPER Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification Yuhei KANEKO Nobuhiko SUGINO Akinori NISHIHARA
	Summary \| Full Text:PDF (782.1KB)

pp.855-861 PAPER A Noise Reduction Method Based on Linear Prediction with Variable Step-Size Arata KAWAMURA Youji IIGUNI Yoshio ITOH
	Summary \| Full Text:PDF (1.6MB)

pp.862-868 PAPER Quantitative Evaluation of State-Preserving Leakage Reduction Algorithm for L1 Data Caches Reiko KOMIYA Koji INOUE Vasily G. MOSHNYAGA Kazuaki MURAKAMI
	Summary \| Full Text:PDF (1012.4KB)

pp.869-875 PAPER Bitwidth Optimization for Low Power Digital FIR Filter Design Kosuke TARUMI Akihiko HYODO Masanori MUROYAMA Hiroto YASUURA
	Summary \| Full Text:PDF (525.5KB)

pp.876-884 PAPER Sub-operation Parallelism Optimization in SIMD Processor Core Synthesis Hideki KAWAZU Jumpei UCHIDA Yuichiro MIYAOKA Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
	Summary \| Full Text:PDF (832KB)

pp.885-891 PAPER Performance Limitation of On-Chip Global Interconnects for High-Speed Signaling Akira TSUCHIYA Masanori HASHIMOTO Hidetoshi ONODERA
	Summary \| Full Text:PDF (1MB)

pp.892-898 PAPER Clock Period Minimization Method of Semi-Synchronous Circuits by Delay Insertion Yukihide KOHIRA Atsushi TAKAHASHI
	Summary \| Full Text:PDF (277.6KB)

pp.899-906 PAPER Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems Yukio MITSUYAMA Motoki KIMURA Takao ONOYE Isao SHIRAKAWA
	Summary \| Full Text:PDF (936.9KB)

pp.907-914 PAPER An Integrated Approach of Variable Ordering and Logic Mapping into LUT-Array-Based PLD Tomonori IZUMI Shin'ichi KOUYAMA Hiroyuki OCHI Yukihiro NAKAMURA
	Summary \| Full Text:PDF (2.1MB)

pp.915-922 PAPER Verifying Trace Equivalence of a Shared-Memory-Style Communication System Yoshinobu KAWABE Ken MANO
	Summary \| Full Text:PDF (236.6KB)

pp.923-929 PAPER Iterative Parallel Genetic Algorithms Based on Biased Initial Population Morikazu NAKAMURA Naruhiko YAMASHIRO Yiyuan GONG Takashi MATSUMURA Kenji ONAGA
	Summary \| Full Text:PDF (586KB)

pp.930-934 PAPER Constant Time Generation of Set Partitions Shin-ichiro KAWANO Shin-ichi NAKANO
	Summary \| Full Text:PDF (232.3KB)

pp.935-940 PAPER Fault-Tolerant Meshes with Constant Degree Toshinori YAMADA
	Summary \| Full Text:PDF (156KB)

pp.941-947 PAPER Making Reactive Systems Highly Reliable by Hypersequential Programming Naoshi UCHIHIRA
	Summary \| Full Text:PDF (539.2KB)

pp.948-953 PAPER IP Paging Schemes Adaptive to Mobile Host Parameters Hung Tuan DO Yoshikuni ONOZATO
	Summary \| Full Text:PDF (494KB)

pp.954-963 PAPER A Linear Time Algorithm for Bi-Connectivity Augmentation of Graphs with Upper Bounds on Vertex-Degree Increase Takanori FUKUOKA Toshiya MASHIMA Satoshi TAOKA Toshimasa WATANABE
	Summary \| Full Text:PDF (301.5KB)

pp.964-971 PAPER Siphon-Trap-Based Algorithms for Efficiently Computing Petri Net Invariants Akihiro TAGUCHI Atsushi IRIBOSHI Satoshi TAOKA Toshimasa WATANABE
	Summary \| Full Text:PDF (224.9KB)

Regular Section

pp.972-977 PAPER-Digital Signal Processing Adaptive Microphone Array System with Two-Stage Adaptation Mode Controller Yang-Won JUNG Hong-Goo KANG Chungyong LEE Dae-Hee YOUN Changkyu CHOI Jaywoo KIM
	Summary \| Full Text:PDF (953.3KB)

pp.978-987 PAPER-Digital Signal Processing Equalizer-Aided Time Delay Tracking Based on L₁-Normed Finite Differences Jonah GAMBA Tetsuya SHIMAMURA
	Summary \| Full Text:PDF (496.7KB)

pp.988-995 PAPER-Digital Signal Processing Fixed-Lag Smoothing Algorithm under Non-independent Uncertainty Seiichi NAKAMORI Aurora HERMOSO-CARAZO Josefa LINARES-PEREZ
	Summary \| Full Text:PDF (478.3KB)

pp.996-1006 PAPER-Analog Signal Processing A Low-Power, Small-Size 10-Bit Successive-Approximation ADC Mehdi BANIHASHEMI Khayrollah HADIDI Abdollah KHOEI
	Summary \| Full Text:PDF (1.2MB)

pp.1007-1014 PAPER-Systems and Control Globally Guaranteed Robustness Adaptive Fuzzy Control with Application on Highly Uncertain Robot Manipulators Chian-Song CHIU
	Summary \| Full Text:PDF (465.9KB)

pp.1015-1023 PAPER-VLSI Design Technology and CAD Minimization of Reversible Wave Cascades Dimitrios VOUDOURIS Stergios STERGIOU George PAPAKONSTANTINOU
	Summary \| Full Text:PDF (234.3KB)

pp.1024-1030 PAPER-VLSI Design Technology and CAD Diagnosis of Timing Faults in Scan Chains Using Single Excitation Patterns James Chien-Mo LI
	Summary \| Full Text:PDF (639.2KB)

pp.1031-1037 PAPER-VLSI Design Technology and CAD A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme Jeong-Gun LEE Suk-Jin KIM Jeong-A LEE Kiseon KIM
	Summary \| Full Text:PDF (1006KB)

pp.1038-1046 PAPER-VLSI Design Technology and CAD SPFD-Based Flexible Transformation of LUT-Based FPGA Circuits Katsunori TANAKA Shigeru YAMASHITA Yahiko KAMBAYASHI
	Summary \| Full Text:PDF (264.9KB)

pp.1047-1054 PAPER-Reliability, Maintainability and Safety Analysis Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI
	Summary \| Full Text:PDF (395.8KB)

pp.1055-1062 PAPER-Information Security A Flexible-Revocation Scheme for Efficient Public-Key Black-Box Traitor Tracing Tatsuyuki MATSUSHITA Hideki IMAI
	Summary \| Full Text:PDF (171.3KB)

pp.1063-1083 PAPER-Information Theory Source Coding Algorithms Using the Randomness of a Past Sequence Jun MURAMATSU
	Summary \| Full Text:PDF (390.7KB)

pp.1084-1089 PAPER-General Fundamentals and Boundaries Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators Jaesang LIM Jaejoon KIM Beomsup KIM
	Summary \| Full Text:PDF (571.5KB)

pp.1090-1092 LETTER-Algorithms and Data Structures A Note on the Complexity of Scheduling for Precedence Constrained Messages in Distributed Systems Koji GODA Toshinori YAMADA Shuichi UENO
	Summary \| Full Text:PDF (69.4KB)

pp.1093-1095 LETTER-Information Security On the Security of Signcryption Scheme with Key Privacy Chik-How TAN
	Summary \| Full Text:PDF (69.7KB)

pp.1096-1098 LETTER-Information Security The Stability of the Lattice Structure of Pseudorandom Number Sequences Zhihua NIU Enjian BAI Guozhen XIAO
	Summary \| Full Text:PDF (62.9KB)