Yuta SAKAMOTO


Modeling and Layout Optimization of MOM Capacitor for High-Frequency Applications
Yuka ITANO Taishi KITANO Yuta SAKAMOTO Kiyotaka KOMOKU Takayuki MORISHITA Nobuyuki ITOH 
Publication:   
Publication Date: 2018/02/01
Vol. E101-A  No. 2  pp. 441-446
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
MOM capacitorparasitic resistanceparasitic inductancelayout optimization
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