Yusaku KANETA


A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions
Yusaku KANETA  Shingo YOSHIZAWA  Shin-ichi MINATO  Hiroki ARIMURA  Yoshikazu MIYANAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/07/01
Vol. E95-D  No. 7  pp. 1847-1857
Type of Manuscript: PAPER
Category: Computer System
Keyword: 
FPGAstring matchingregular expression matchingbit-parallel algorithmevent stream processing
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