Yukiya MIURA


Ramp Voltage Testing for Detecting Interconnect Open Faults
Yukiya MIURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3  pp. 700-705
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: Defect-Based Testing
Keyword: 
CMOS circuitsdefect oriented testingopen faultsramp voltage
 Summary | Full Text:PDF(371.1KB)

Analysis and Testing of Bridging Faults in CMOS Synchronous Sequential Circuits
Yukiya MIURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/03/01
Vol. E87-D  No. 3  pp. 564-570
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSI)
Category: Fault Detection
Keyword: 
bridging faultsCMOS synchronous sequential circuitsfault analysistesting
 Summary | Full Text:PDF(796.9KB)

IDDQ Test Time Reduction by High Speed Charging of Load Capacitors of CMOS Logic Gates
Masaki HASHIZUME Teppei TAKEDA Masahiro ICHIMIYA Hiroyuki YOTSUYANAGI Yukiya MIURA Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10  pp. 1534-1541
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Current Test
Keyword: 
IDDQ sensorCMOSIDDQ testbridging fault
 Summary | Full Text:PDF(690.4KB)

Analysis and Testing of Analog and Mixed-Signal Circuits by an Operation-Region Model
Yukiya MIURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D  No. 10  pp. 1551-1557
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Analog/Mixed Signal Test
Keyword: 
abstract circuit modelanalog and mixed-signal circuitsanalysis and testingCMOS circuitoperation region
 Summary | Full Text:PDF(718.1KB)

Analysis of IDDQ Occurrence in Testing
Arabi KESHK Yukiya MIURA Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2001/04/01
Vol. E84-D  No. 4  pp. 534-536
Type of Manuscript:  LETTER
Category: Computer System Element
Keyword: 
IDDQ testingbridging faultfault analysis
 Summary | Full Text:PDF(205.2KB)

An IDDQ Sensor Driven by Abnormal IDDQ
Yukiya MIURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/10/25
Vol. E83-D  No. 10  pp. 1860-1867
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
built-in testingCMOS circuitsIDDQ sensor circuitsIDDQ testinglow-voltage ICs
 Summary | Full Text:PDF(3.7MB)

Fault Behavior and Change in Internal Condition of Mixed-Signal Circuits
Yukiya MIURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/04/25
Vol. E83-D  No. 4  pp. 943-945
Type of Manuscript:  LETTER
Category: Fault Tolerance
Keyword: 
CMOS mixed-signal circuitsfault analysisMOS transistorsoperation regionstesting
 Summary | Full Text:PDF(37.2KB)

An Analysis of the Relationship between IDDQ Testability and D-Type Flip-Flop Structure
Yukiya MIURA Hiroshi YAMAZAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/10/25
Vol. E81-D  No. 10  pp. 1072-1078
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
IDDQ testingbridging faultsflip-flopsfault analysis
 Summary | Full Text:PDF(571.6KB)

A Method of Current Testing for CMOS Digital and Mixed-Signal LSIs
Yukiya MIURA Sachio NAITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7  pp. 845-852
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
current testing (IDDQ testing)built-in testdesign for testabilitydigital and mixed-signal circuit testing
 Summary | Full Text:PDF(649.7KB)

Testable Design for Stuck-Open Faults with the Robustness
Yukiya MIURA Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1990/08/25
Vol. E73-E  No. 8  pp. 1294-1300
Type of Manuscript:  Special Section PAPER (Special Issue on Fault-Tolerant Systems)
Category: 
Keyword: 
 Summary | Full Text:PDF(589.5KB)