Yukinori SATO


Identifying Program Loop Nesting Structures during Execution of Machine Code
Yukinori SATO Yasushi INOGUCHI Tadao NAKAMURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/09/01
Vol. E97-D  No. 9  pp. 2371-2385
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
dynamic loop nestsloop-call context treeon-the-fly loop detection
 Summary | Full Text:PDF(1.9MB)

A Prediction-Based Green Scheduler for Datacenters in Clouds
Truong Vinh Truong DUY Yukinori SATO Yasushi INOGUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/09/01
Vol. E94-D  No. 9  pp. 1731-1741
Type of Manuscript:  PAPER
Category: Fundamentals of Information Systems
Keyword: 
energy savingsgreen schedulingneural predictorcloud computingdatacenters
 Summary | Full Text:PDF(1.9MB)

On Nonuniform Traffic Pattern of Modified Hierarchical 3D-Torus Network
M.M. Hafizur RAHMAN Yukinori SATO Yasushi INOGUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/05/01
Vol. E94-D  No. 5  pp. 1109-1112
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
MH3DT networkdeadlock-free routingnon-uniform trafficInter-node communication performance
 Summary | Full Text:PDF(615.3KB)

TTN: A High Performance Hierarchical Interconnection Network for Massively Parallel Computers
M.M. Hafizur RAHMAN Yasushi INOGUCHI Yukinori SATO Susumu HORIGUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2009/05/01
Vol. E92-D  No. 5  pp. 1062-1078
Type of Manuscript:  PAPER
Category: Computer Systems
Keyword: 
interconnection networkTTNstatic network performancewormhole routingdeadlock-free routingtraffic patternsdynamic communication performance
 Summary | Full Text:PDF(1MB)

Power Estimation of Partitioned Register Files in a Clustered Architecture with Performance Evaluation
Yukinori SATO Ken-ichi SUZUKI Tadao NAKAMURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/03/01
Vol. E90-D  No. 3  pp. 627-636
Type of Manuscript:  PAPER
Category: VLSI Systems
Keyword: 
clustered architecturepartitioned register filesnon-consistent register filesinstruction level parallelism
 Summary | Full Text:PDF(575KB)