Yuichiro YASUI


Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs
Satoshi IMAMURA Yuichiro YASUI Koji INOUE Takatsugu ONO Hiroshi SASAKI Katsuki FUJISAWA 
Publication:   
Publication Date: 2018/09/01
Vol. E101-D  No. 9  pp. 2247-2257
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
DRAMaddress mapping schemesenergy efficiency
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