Yoshisato SASAKI

Modeling and Parameter Extraction Technique for Uni-Directional HV MOS Devices
Takao MYONO  Eiji NISHIBE  Shuichi KIKUCHI  Katsuhiko IWATSU  Takuya SUZUKI  Yoshisato SASAKI  Kazuo ITOH  Haruo KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/03/20
Vol. E83-A  No. 3  pp. 412-420
Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 12th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
high-voltage MOS,  BSIM3,  SPICE model, 
  Summary |  Full Text:PDF
A Code-Division Multiplexing Technique for Efficient Data Transmission in VLSI Systems
Yasushi YUMINAKA  Kazuhiko ITOH  Yoshisato SASAKI  Takafumi AOKI  Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/20
Vol. E82-C  No. 9  pp. 1669-1677
Type of Manuscript: Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Non-Binary Architectures
Keyword: 
VLSI systems,  code division multiplexing,  m-sequence,  new paradigm computing,  spread-spectrum image processing, 
  Summary |  Full Text:PDF
High-Voltage MOS Device Modeling with BSIM3v3 SPICE Model
Takao MYONO  Eiji NISHIBE  Shuichi KIKUCHI  Katsuhiko IWATSU  Takuya SUZUKI  Yoshisato SASAKI  Kazuo ITOH  Haruo KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/04/20
Vol. E82-C  No. 4  pp. 630-637
Type of Manuscript: Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: 
Keyword: 
high-voltage MOS,  BSIM3,  SPICE model, 
  Summary |  Full Text:PDF