Yoshihide AJIOKA


A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures
Toshiki KANAMOTO  Tetsuya WATANABE  Mitsutoshi SHIROTA  Masayuki TERAI  Tatsuya KUNIKIYO  Kiyoshi ISHIKAWA  Yoshihide AJIOKA  Yasutaka HORIBA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3463-3470
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword: 
SoCinterconnectphysical parameterlow-kcapacitanceresistancelayout parasitic extraction
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Physical Design Methodology for On-Chip 64-Mb DRAM MPEG-2 Encoding with a Multimedia Processor
Hidehiro TAKATA  Rei AKIYAMA  Tadao YAMANAKA  Haruyuki OHKUMA  Yasue SUETSUGU  Toshihiro KANAOKA  Satoshi KUMAKI  Kazuya ISHIHARA  Atsuo HANAMI  Tetsuya MATSUMURA  Tetsuya WATANABE  Yoshihide AJIOKA  Yoshio MATSUDA  Syuhei IWADE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2  pp. 368-374
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: Product Designs
Keyword: 
multimedia processorclock skewcross-talk noiseIR dropMPEG-2 encoder
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A Chip Set for Programmable Real-Time MPEG2 MP@ML Video Encoder
Tetsuya MATSUMURA  Hiroshi SEGAWA  Satoshi KUMAKI  Yoshinori MATSUURA  Atsuo HANAMI  Kazuya ISHIHARA  Shin-ichi NAKAGAWA  Tadashi KASEZAWA  Yoshihide AJIOKA  Atsushi MAEDA  Masahiko YOSHIMOTO  Tadashi SUMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/20
Vol. E81-C  No. 5  pp. 680-694
Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: 
Keyword: 
video compression/decompressionvideo encoderMPEG2video signal processor
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