Yohei HORI


Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage
Daisuke FUJIMOTO Noriyuki MIURA Makoto NAGATA Yuichi HAYASHI Naofumi HOMMA Takafumi AOKI Yohei HORI Toshihiro KATASHITA Kazuo SAKIYAMA Thanh-Ha LE Julien BRINGER Pirouz BAZARGAN-SABET Shivam BHASIN Jean-Luc DANGER 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 272-279
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
information leakageside-channel attackcorrelation power analysisadvance encryption standard
 Summary | Full Text:PDF(4MB)

A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation
Daisuke FUJIMOTO Toshihiro KATASHITA Akihiko SASAKI Yohei HORI Akashi SATOH Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2533-2541
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
power supply currentelectromagnetic leakageinformation leakageAES
 Summary | Full Text:PDF(2.9MB)

Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption
Yohei HORI Toshihiro KATASHITA Hirofumi SAKANE Kenji TODA Akashi SATOH 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/11/01
Vol. E96-D  No. 11  pp. 2333-2343
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
dynamic partial reconfiguration (DPR)field-programmable gate array (FPGA)Advanced Encryption Standard (AES)Galois/Counter Mode (GCM)authenticated encryption
 Summary | Full Text:PDF(1.1MB)

A Secure Content Delivery System Based on a Partially Reconfigurable FPGA
Yohei HORI Hiroyuki YOKOYAMA Hirofumi SAKANE Kenji TODA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/05/01
Vol. E91-D  No. 5  pp. 1398-1407
Type of Manuscript:  Special Section PAPER (Special Section on Information and Communication System Security)
Category: Contents Protection
Keyword: 
field-programmable gate array (FPGA)partial run-time reconfiguration (RTR)content protectiondigital rights management (DRM)
 Summary | Full Text:PDF(840.1KB)

Comparison between an AND Array and a Booth Encoder for Large-Scale Phase-Mode Multipliers
Yohei HORIMA Itsuhei SHIMIZU Masayuki KOBORI Takeshi ONOMI Koji NAKAJIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/01/01
Vol. E86-C  No. 1  pp. 16-23
Type of Manuscript:  Special Section PAPER (Special Issue on Superconductor Digital/Analog Circuit Technologies)
Category: LTS Digital Application
Keyword: 
single flux quantumPhase-Mode parallel multiplierhybrid structureAND arrayBooth encoder
 Summary | Full Text:PDF(711.7KB)