Yohei HASEGAWA


A Fine Grain Dynamic Sleep Control Scheme in MIPS R3000
Naomi SEKI  Lei ZHAO  Yu KOJIMA  Daisuke IKEBUCHI  Yohei HASEGAWA  Naoaki OHKUBO  Seidai TAKEDA  Toshihiro KASHIMA  Toshiaki SHIRAI  Kimiyoshi USAMI  Tetsuya SUNATA  Jun KANAI  Mitaro NAMIKI  Hiroaki KONDO  Hiroshi NAKAMURA  Hideharu AMANO 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2010/06/01
Vol. J93-D  No. 6  pp. 920-930
Type of Manuscript: PAPER
Category: 
Keyword: 
low power processorpower gatingleakage
  Summary |  Full Text(in Japanese):PDF (1.4MB)

Multi-Cast Methods for Configuration Data Transfer on Dynamically Reconfigurable Devices
Takuro NAKAMURA  Toru SANO  Satoshi TSUTSUMI  Yohei HASEGAWA  Vasutan TUNBUNHENG  Hideharu AMANO 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2009/12/01
Vol. J92-D  No. 12  pp. 2185-2194
Type of Manuscript: PAPER
Category: 
Keyword: 
dynamically reconfigurable processorconfiguration scheme
  Summary |  Full Text(in Japanese):PDF (607.3KB)

Power Analysis and Power Reduction Techniques for Dynamically Reconfigurable Processors
Takashi NISHIMURA  Keiichiro HIRAI  Yoshiki SAITO  Takuro NAKAMURA  Satoshi TSUTSUMI  Yohei HASEGAWA  Hideharu AMANO 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2009/10/01
Vol. J92-D  No. 10  pp. 1763-1771
Type of Manuscript: PAPER
Category: 
Keyword: 
dynamically reconfigurable processorlow power consumption
  Summary |  Full Text(in Japanese):PDF (461.3KB)

An Overwrite Configuration Technique for Multicast Configuration Scheme
Satoshi TSUTSUMI  Vasutan TUNBUNHENG  Yohei HASEGAWA  Adepu PARIMALA  Takuro NAKAMURA  Takashi NISHIMURA  Hideharu AMANO 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2008/04/01
Vol. J91-D  No. 4  pp. 922-933
Type of Manuscript: PAPER
Category: 
Keyword: 
dynamically reconfigurable processorconfiguration schemescheduling
  Summary |  Full Text(in Japanese):PDF (619.9KB)

A Clock Control Mechanism Using Context Dependent Delay for Dynamically Reconfigurable Processors
Satoshi TSUTSUMI  Hideharu AMANO  Yohei HASEGAWA  Ken'ichiro ISHIKAWA  Shohei ABE  Shunsuke KUROTAKI  Takuro NAKAMURA  Takashi NISHIMURA 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2007/10/01
Vol. J90-D  No. 10  pp. 2704-2712
Type of Manuscript: PAPER
Category: 
Keyword: 
dynamically reconfigurable processorcontext controlclock control
  Summary |  Full Text(in Japanese):PDF (481.2KB)

A Novel Cost-Effective Context Memory Structure for Dynamically Reconfigurable Processors
Masayasu SUZUKI  Yohei HASEGAWA  Shohei ABE  Vu Manh TUAN  Hideharu AMANO 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2006/06/01
Vol. J89-D  No. 6  pp. 1101-1109
Type of Manuscript: Special Section PAPER (Special Issue Reconfigurable Systems)
Category: 
Keyword: 
dynamically reconfigurable processormulti-context schemehigh speed configuration
  Summary |  Full Text(in Japanese):PDF (485.5KB)

An Adaptive Cryptographic Accelerator for IPsec on the Dynamically Reconfigurable Processor
Yohei HASEGAWA  Shohei ABE  Hiroki MATSUTANI  Kenichiro ANJO  Toru AWASHIMA  Hideharu AMANO 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2006/04/01
Vol. J89-D  No. 4  pp. 743-754
Type of Manuscript: PAPER
Category: 
Keyword: 
dynamically reconfigurable processorDRPvirtual hardwareIP security
  Summary |  Full Text(in Japanese):PDF (573.2KB)