Yasushi YUMINAKA


High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding
Yosuke IIJIMA Yuuki TAKADA Yasushi YUMINAKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/09/01
Vol. E97-D  No. 9  pp. 2296-2303
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Communication for VLSI
Keyword: 
high-speed interfaceTomlinson-Harashima precoding (THP)intersymbol interferencemultiple-valued signalinglow-voltage VLSI systems
 Summary | Full Text:PDF(4.3MB)

Multiple-Valued Data Transmission Based on Time-Domain Pre-Emphasis Techniques
Yasushi YUMINAKA Yasunori TAKAHASHI Kenichi HENMI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8  pp. 2109-2116
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Multiple-Valued VLSI Technology
Keyword: 
pre-emphasishigh-speed interfacemultiple-valued logicequalizationdata-dependent jitter
 Summary | Full Text:PDF(1.1MB)

An Efficient Data Transmission Technique for VLSI Systems Using Multiple-Valued Code-Division Multiple Access
Yasushi YUMINAKA Shinya SAKAMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/08/01
Vol. E85-C  No. 8  pp. 1581-1587
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance Analog Integrated Circuits)
Category: 
Keyword: 
VLSI systemscode division multiple access (CDMA)m-sequencenew paradigm computingcurrent-mode MOS circuits
 Summary | Full Text:PDF(1.2MB)

A Code-Division Multiplexing Technique for Efficient Data Transmission in VLSI Systems
Yasushi YUMINAKA Kazuhiko ITOH Yoshisato SASAKI Takafumi AOKI Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Vol. E82-C  No. 9  pp. 1669-1677
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Non-Binary Architectures
Keyword: 
VLSI systemscode division multiplexingm-sequencenew paradigm computingspread-spectrum image processing
 Summary | Full Text:PDF(1.9MB)

Design of Wave-Parallel Computing Architectures and Its Application to Massively Parallel Image Processing
Yasushi YUMINAKA Takafumi AOKI Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7  pp. 1133-1143
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Multiple-Valued Architectures and Systems
Keyword: 
multiple-valued logicset-valued logicparallel processingfrequency multiplexing
 Summary | Full Text:PDF(1013.4KB)