Yasumasa IKEZAKI

A 1.5 V, 200 MHz, 400 MIPS, 188 µA/MHz and 1.2 V, 300 MHz, 600 MIPS, 169 µA/MHz Digital Signal Processor Core for 3G Wireless Applications
Hiroshi TAKAHASHI  Shigeshi ABIKO  Kenichi TASHIRO  Kaoru AWAKA  Yutaka TOYONOH  Rimon IKENO  Shigetoshi MURAMATSU  Yasumasa IKEZAKI  Tsuyoshi TANAKA  Akihiro TAKEGAMA  Hiroshi KIMIZUKA  Hidehiko NITTA  Miki KOJIMA  Masaharu SUZUKI  James Lowell LARIMER 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 491-501
Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
200 MHz,  300 MHz,  400 MIPS,  600 MIPS,  high-speed,  low-power,  fixed point DSP,  130 nm, 
  Summary |  Full Text:PDF (2.4MB)
High-Speed and Low-Power Techniques of Hardware and Software for Digital Signal Processors
Hiroshi TAKAHASHI  Rimon IKENO  Yutaka TOYONOH  Akihiro TAKEGAMA  Yasumasa IKEZAKI  Tohru URASAKI  Hitoshi SATOH  Masayasu ITOIGAWA  Yoshinari MATSUMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 589-596
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Circuit Design
Keyword: 
high speed,  low power,  fixed point DSP,  160 MHz,  0.18 µm, 
  Summary |  Full Text:PDF (1.7MB)