Yasuhiko TAITO

A Low Power Embedded DRAM Macro for Battery-Operated LSIs
Takeshi FUJINO  Akira YAMAZAKI  Yasuhiko TAITO  Mitsuya KINOSHITA  Fukashi MORISHITA  Teruhiko AMANO  Masaru HARAGUCHI  Makoto HATAKENAKA  Atsushi AMO  Atsushi HACHISUKA  Kazutami ARIMOTO  Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 2991-3000
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Power Optimization
Keyword: 
embedded memory,  DRAM,  low power,  system on chip, 
  Summary |  Full Text:PDF (2.9MB)
An Embedded DRAM Hybrid Macro with Auto Signal Management and Enhanced-on-Chip Tester
Naoya WATANABE  Fukashi MORISHITA  Yasuhiko TAITO  Akira YAMAZAKI  Tetsushi TANIZAKI  Katsumi DOSAKA  Yoshikazu MOROOKA  Futoshi IGAUE  Katsuya FURUE  Yoshihiro NAGURA  Tatsunori KOMOIKE  Toshinori MORIHARA  Atsushi HACHISUKA  Kazutami ARIMOTO  Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 624-634
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
embedded DRAM,  various DRAM macros,  low voltage operation,  short TAT,  BIST, 
  Summary |  Full Text:PDF (5.2MB)