Yasuaki NISHITANI

A Lower Bound on the Number of Toffoli Gates in Reversible Logic Circuits
Masayuki HIGASHIOHNO  Takashi HIRAYAMA  Yasuaki NISHITANI 
Publication:   A - Abstracts of IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences (Japanese Edition)
Publication Date: 2009/04/01
Vol. J92-A  No. 4  pp. 263-266
Type of Manuscript: LETTER
Category: 
Keyword: 
reversible logic circuits,  Toffoli gates,  lower bound, 
  Summary |  Full Text(in Japanese):PDF (126.5KB)
Generating Hypercube Algorithms from Powerlist Descriptions
Masayuki HIGASHIOHNO  Yasuaki NISHITANI 
Publication:   D - Abstracts of IEICE TRANSACTIONS on Information and Systems (Japanese Edition)
Publication Date: 2007/11/01
Vol. J90-D  No. 11  pp. 2959-2969
Type of Manuscript: PAPER
Category: 
Keyword: 
powerlists,  hypercubes,  parallel algorithms,  program derivation, 
  Summary |  Full Text(in Japanese):PDF (395.5KB)