Yasuaki ITO


An FPGA Implementation for a Flexible-Length-Arithmetic Processor Employing the FDFM Processor Core Approach
Tatsuya KAWAMOTO Xin ZHOU Jacir L. BORDIM Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/12/01
Vol. E99-D  No. 12  pp. 2901-2910
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Architecture
Keyword: 
multiple-length-numbersmultiple-length-arithmeticFPGARSAmontgomery modular multiplication
 Summary | Full Text:PDF(667.9KB)

GPU-Accelerated Bulk Execution of Multiple-Length Multiplication with Warp-Synchronous Programming Technique
Takumi HONDA Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/12/01
Vol. E99-D  No. 12  pp. 3004-3012
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: GPU computing
Keyword: 
multiple-length multiplicationGPUGPGPUparallel processingwarp-synchronous
 Summary | Full Text:PDF(523KB)

A Memory-Access-Efficient Implementation for Computing the Approximate String Matching Algorithm on GPUs
Lucas Saad Nogueira NUNES Jacir Luiz BORDIM Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/12/01
Vol. E99-D  No. 12  pp. 2995-3003
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: GPU computing
Keyword: 
approximate string matchingedit distanceGPUCUDAshuffle instructions
 Summary | Full Text:PDF(2MB)

Fully Parallelized LZW Decompression for CUDA-Enabled GPUs
Shunji FUNASAKA Koji NAKANO Yasuaki ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2016/12/01
Vol. E99-D  No. 12  pp. 2986-2994
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: GPU computing
Keyword: 
data compressionbig dataparallel algorithmGPUCUDA
 Summary | Full Text:PDF(428KB)

Offline Permutation on the CUDA-enabled GPU
Akihiko KASAGI Koji NAKANO Yasuaki ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/12/01
Vol. E97-D  No. 12  pp. 3052-3062
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: GPU
Keyword: 
memory machine modelsoffline permutationGPUCUDA
 Summary | Full Text:PDF(1.2MB)

An Optimal Implementation of the Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation on the GPU
Duhu MAN Koji NAKANO Yasuaki ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/12/01
Vol. E97-D  No. 12  pp. 3063-3071
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: GPU
Keyword: 
memory machine modelsapproximate string matchingedit distanceGPUCUDA
 Summary | Full Text:PDF(584.8KB)

Offline Permutation Algorithms on the Discrete Memory Machine with Performance Evaluation on the GPU
Akihiko KASAGI Koji NAKANO Yasuaki ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/12/01
Vol. E96-D  No. 12  pp. 2617-2625
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
memory machine modelsdata movementbank conflictshared memoryGPUCUDA
 Summary | Full Text:PDF(487.9KB)

A GPU Implementation of Dynamic Programming for the Optimal Polygon Triangulation
Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/12/01
Vol. E96-D  No. 12  pp. 2596-2603
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
dynamic programmingparallel algorithmscoalesced memory accessGPGPUCUDA
 Summary | Full Text:PDF(439.3KB)

A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones
Md. Nazrul Islam MONDAL Koji NAKANO Yasuaki ITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/12/01
Vol. E94-D  No. 12  pp. 2378-2388
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
FPGAblock RAMsasynchronous read operationsrewriting algorithm
 Summary | Full Text:PDF(476.1KB)

An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver
Jacir Luiz BORDIM Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/05/01
Vol. E89-A  No. 5  pp. 1355-1361
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
adhoc networkscollision detectiondistributed algorithmsrandomized algorithms
 Summary | Full Text:PDF(209.5KB)

Accelerating the CKY Parsing Using FPGAs
Jacir L. BORDIM Yasuaki ITO Koji NAKANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5  pp. 803-810
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
CKY parsingFPGAsreconfigurable architecturesreconfigurable computing
 Summary | Full Text:PDF(850.3KB)