Xiaoyang ZENG


A High-Throughput and Compact Hardware Implementation for the Reconstruction Loop in HEVC Intra Encoding
Yibo FAN Leilei HUANG Zheng XIE Xiaoyang ZENG 
Publication:   
Publication Date: 2017/06/01
Vol. E100-C  No. 6  pp. 643-654
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
reconstruction loopdiscrete cosine transform (DCT)inverse discrete cosine transform (IDCT)quantization (Q)de-quantization (IQ)high efficiency video coding (HEVC)
 Summary | Full Text:PDF(2.2MB)

A Unified Forward/Inverse Transform Architecture for Multi-Standard Video Codec Design
Sha SHEN Weiwei SHEN Yibo FAN Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/07/01
Vol. E96-A  No. 7  pp. 1534-1542
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
HEVCinteger DCT/IDCTHadamard transforminput-muxed constant multipliermulti-standard video coding
 Summary | Full Text:PDF(1.8MB)

A 1.5 Gb/s Highly Parallel Turbo Decoder for 3GPP LTE/LTE-Advanced
Yun CHEN Xubin CHEN Zhiyuan GUO Xiaoyang ZENG Defeng HUANG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2013/05/01
Vol. E96-B  No. 5  pp. 1211-1214
Type of Manuscript:  LETTER
Category: Fundamental Theories for Communications
Keyword: 
turbo decoderparallel architectureLTE4G
 Summary | Full Text:PDF(1MB)

A Flexible Architecture for TURBO and LDPC Codes
Yun CHEN Yuebin HUANG Chen CHEN Changsheng ZHOU Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12  pp. 2392-2395
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
LDPCTurboFlexible architecture
 Summary | Full Text:PDF(392.1KB)

A Fully Programmable Reed-Solomon Decoder on a Multi-Core Processor Platform
Bei HUANG Kaidi YOU Yun CHEN Zhiyi YU Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12  pp. 2939-2947
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer Architecture
Keyword: 
parallel computingmapping strategiesReed Solomon decodermulticore processor
 Summary | Full Text:PDF(1.2MB)

Design Approach and Implementation of Application Specific Instruction Set Processor for SHA-3 BLAKE Algorithm
Yuli ZHANG Jun HAN Xinqian WENG Zhongzhu HE Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/08/01
Vol. E95-C  No. 8  pp. 1415-1426
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
SHA-3BLAKE algorithmISEASIP
 Summary | Full Text:PDF(2MB)

A 64 Cycles/MB, Luma-Chroma Parallelized H.264/AVC Deblocking Filter for 4 K2 K Applications
Weiwei SHEN Yibo FAN Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 441-446
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
H.264/AVCdeblocking filterpipelineparallelism4 K2 K
 Summary | Full Text:PDF(1.8MB)

An Area-Efficient Reconfigurable LDPC Decoder with Conflict Resolution
Changsheng ZHOU Yuebin HUANG Shuangqu HUANG Yun CHEN Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 478-486
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
LDPC decoderTDMPCMMBDTMBconflict resolution
 Summary | Full Text:PDF(1.8MB)

Efficient Implementation of OFDM Inner Receiver on a Programmable Multi-Core Processor Platform
Wenhua FAN Chen CHEN Yun CHEN Zhiyi YU Xiaoyang ZENG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/04/01
Vol. E95-B  No. 4  pp. 1241-1248
Type of Manuscript:  Special Section PAPER (Special Section on Cognitive Radio and Heterogeneous Wireless Networks in Conjunction with Main Topics of CrownCom2011)
Category: 
Keyword: 
OFDMinner receiverCMMBmulti-core processorSDR
 Summary | Full Text:PDF(1.1MB)

An 88/44 Adaptive Hadamard Transform Based FME VLSI Architecture for 4 K2 K H.264/AVC Encoder
Yibo FAN Jialiang LIU Dexue ZHANG Xiaoyang ZENG Xinhua CHEN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 447-455
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
fractional motion estimationadaptive block-size hadamard transformH.264/MPEG4 AVC4 K2 Kquad full high definition
 Summary | Full Text:PDF(2.1MB)

A High Speed Reconfigurable Face Detection Architecture Based on AdaBoost Cascade Algorithm
Weina ZHOU Lin DAI Yao ZOU Xiaoyang ZENG Jun HAN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/02/01
Vol. E95-D  No. 2  pp. 383-391
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Application
Keyword: 
face detectionreconfigurableuser adjustableAdaBoost
 Summary | Full Text:PDF(968.2KB)

A Flexible LDPC Decoder Architecture Supporting TPMP and TDMP Decoding Algorithms
Shuangqu HUANG Xiaoyang ZENG Yun CHEN 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/02/01
Vol. E95-D  No. 2  pp. 403-412
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Application
Keyword: 
iterative decodingLDPC codesreconfigurable architectureTDMPTPMP
 Summary | Full Text:PDF(1.6MB)

Efficient Iterative Frequency Domain Equalization for Single Carrier System with Insufficient Cyclic Prefix
Chuan WU Dan BAO Xiaoyang ZENG Yun CHEN 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2011/07/01
Vol. E94-B  No. 7  pp. 2174-2177
Type of Manuscript:  LETTER
Category: Wireless Communication Technologies
Keyword: 
single-carrier frequency domain equalization (SC-FDE)ISIMMSEcyclic prefix reconstruction (CPR)
 Summary | Full Text:PDF(303.6KB)

A Scalable and Reconfigurable Fault-Tolerant Distributed Routing Algorithm for NoCs
Zewen SHI Xiaoyang ZENG Zhiyi YU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/07/01
Vol. E94-D  No. 7  pp. 1386-1397
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
fault-tolerant routingnetwork-on-chip (NoC)deadlock-freedivide-and-conquersystem partition
 Summary | Full Text:PDF(3.2MB)

Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H.264/AVC
Yibo FAN Xiaoyang ZENG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 411-418
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
IMEVBSME2-D SAD treeH.264
 Summary | Full Text:PDF(1.6MB)

A Cost-Efficient LDPC Decoder for DVB-S2 with the Solution to Address Conflict Issue
Yan YING Dan BAO Zhiyi YU Xiaoyang ZENG Yun CHEN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/08/01
Vol. E93-A  No. 8  pp. 1415-1424
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: Digital Signal Processing
Keyword: 
Normalized Min-SumTDMPaddress conflictdual line-scanhardware reusing
 Summary | Full Text:PDF(1.1MB)

A Novel Five-Point Algorithm of Phase Noise Cancellation in DTMB
Yun CHEN Xiaoyang ZENG An PAN Jing WANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/11/01
Vol. E90-A  No. 11  pp. 2608-2611
Type of Manuscript:  LETTER
Category: Digital Signal Processing
Keyword: 
phase noiseOFDMICI
 Summary | Full Text:PDF(353.7KB)