Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-ANo. 12pp. 2384-2391 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: WiMAX,
bit-serial,
layered scheduling,
QC-LDPC,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/12/01 Vol. E94-ANo. 12pp. 2587-2596 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: WPAN,
IEEE802.15.3c,
LDPC decoder,
high data rate,
power-efficient,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-ANo. 12pp. 2551-2559 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: High-Level Synthesis and System-Level Design Keyword: LDPC decoder,
reconfigurable,
permutation network,
parallelism,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/03/01 Vol. E93-CNo. 3pp. 270-278 Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration) Category: Keyword: permutation,
banyan network,
LDPC decoder,
reconfigurable,
